nesdev.com

Yes, the USB2SNES interface can access the entire SNES memory map. Check out https://github.com/KatDevsGames/connectorlib for a C# library that interfaces with it (through the WebSocket tray app, so you need to have that running, it doesn't interface directly with the virtual serial port).

Having an accurate clone of the PPU hardware would also allow creating an alternative to the NESRGB to output clean RGB or YPbPr video, with custom palette selection, without needing an original PPU as well to make it work.

I'm not sure exactly when I downloaded this, so it might not be the latest version, but it's at least something.

https://drive.google.com/uc?export=down ... L_i7MmsYgZ

Man, if we could get this and the disassembler enhancements here merged upstream, we'd have a seriously powerful debug environment.

I actually tried playing around with VS Code integration awhile back, so I'm really happy to see that somebody managed to succeed where I failed. That being said, however, I was able to get bass v15 syntax highlighting working.

I'm pretty sure the tests were written for NTSC consoles, so it doesn't surprise me that they fail on PAL consoles.

Thank you very much, it works perfectly, but for now i don't know if this debugger gives what i need. I have no much time until this night, but i've seen this: How is supossed to be used with YY-CHR editor? ( link ). If i divide every group of number in three section for RGB, all i have are black c...

Apparently byuu managed to find blargg's long-lost SPC test ROMs on an old thumb drive. They were posted to his board, but I figured somebody around here might be interested in them. - spc_dsp6.sfc - spc_mem_access_times.sfc - spc_spc.sfc - spc_timer.sfc Download mirror 1 Download mirror 2 I may pla...

Here's a logic trace of OAM DMA that gekkio sent me that supports this. Normal memory accesses do seem to pulse /CS on each access though. Ah. Thank you. Just to clarify, I don't believe that trace was from a GBA, but from a DMG executing OAM DMA. So maybe it isn't directly relevant to your stateme...

Other that timing difference, at least on DMG, there's no functional difference between (/CS=0 AND A14=0) and (A[15..13]='b'101). I'm just telling you what I have found from my MBC5 test bench. A15 and A13 are ignored by the /RAMCS decoder. Enabling RAM Loading address $0000, /CS LOW SRAM /CS Statu...

A couple of issues I see from my own testing, the ROM bank should be set to 1 on reset, not 0, and the ram enable decoding isn't quite right. You forgot to include the not_cs input, and the decoding actually only cares that A14 is low (rather than A15:13 = 101). assign out_ram_enable = cs || !ram_en...

I wonder if it might be possible to reduce the wiring by just disconnecting the high address line from the Cx4 and feeding that directly into the ROM chip (so the Cx4 thinks it's always within the 16Mbit memory space and doesn't tri-state the data lines).

Id bet its this standard 40 pin one. First time seeing one personally. [That's a bit big for a "tiny" pic --MOD] This pinout is almost correct, but /CS and /RD are swapped (a lot of pinouts you find online get them backwards because Nintendo likes to play fast and loose with those two signals on th...

The surface mount MaskROMs on Cx4 and GSU boards have the same pinout as the through-hole MaskROMs on most carts, for both the 32 and 36 pin packages. For some reason, Sharp used the LH538 part number for some SNES MaskROMs as well as Game Boy ones, but the pinouts are NOT the same between them. Her...

I'm pretty sure ikari has said that the SD2SNES's built-in RTC is actually based on the SPC7110, so you can probably use that instead of reinventing the wheel...