Search found 773 matches
- Wed Feb 06, 2019 2:52 pm
- Forum: SNESdev
- Topic: Can C# access USB2SNES WRAM?
- Replies: 4
- Views: 4883
Re: Can C# access USB2SNES WRAM?
Yes, the USB2SNES interface can access the entire SNES memory map. Check out https://github.com/KatDevsGames/connectorlib for a C# library that interfaces with it (through the WebSocket tray app, so you need to have that running, it doesn't interface directly with the virtual serial port).
- Wed Jan 23, 2019 3:21 am
- Forum: Homebrew Projects
- Topic: Someone for finish Universal PPU project (FPGA for real NES)
- Replies: 18
- Views: 22870
Re: Someone for finish Universal PPU project (FPGA for real
Having an accurate clone of the PPU hardware would also allow creating an alternative to the NESRGB to output clean RGB or YPbPr video, with custom palette selection, without needing an original PPU as well to make it work.
- Mon Jan 21, 2019 11:12 am
- Forum: Homebrew Projects
- Topic: Someone for finish Universal PPU project (FPGA for real NES)
- Replies: 18
- Views: 22870
Re: Someone for finish Universal PPU project (FPGA for real
I'm not sure exactly when I downloaded this, so it might not be the latest version, but it's at least something.
https://drive.google.com/uc?export=down ... L_i7MmsYgZ
https://drive.google.com/uc?export=down ... L_i7MmsYgZ
- Tue Nov 27, 2018 9:15 pm
- Forum: SNESdev
- Topic: Using VS Code as an IDE for debugging assembly with source
- Replies: 21
- Views: 25491
Re: Using VS Code as an IDE for debugging assembly with sour
Man, if we could get this and the disassembler enhancements here merged upstream, we'd have a seriously powerful debug environment.
- Mon Nov 19, 2018 3:10 pm
- Forum: SNESdev
- Topic: bsnes-plus and xkas-plus (new debugger and assembler)
- Replies: 210
- Views: 165439
Re: bsnes-plus and xkas-plus (new debugger and assembler)
I actually tried playing around with VS Code integration awhile back, so I'm really happy to see that somebody managed to succeed where I failed. That being said, however, I was able to get bass v15 syntax highlighting working.
- Tue Nov 06, 2018 8:45 pm
- Forum: SNESdev
- Topic: blargg's SPC test ROMs
- Replies: 34
- Views: 30761
Re: blargg's SPC test ROMs
I'm pretty sure the tests were written for NTSC consoles, so it doesn't surprise me that they fail on PAL consoles.
- Tue Nov 06, 2018 5:51 pm
- Forum: SNESdev
- Topic: Trying to use TILE LAYER PRO
- Replies: 25
- Views: 14383
Re: Trying to use TILE LAYER PRO
Thank you very much, it works perfectly, but for now i don't know if this debugger gives what i need. I have no much time until this night, but i've seen this: How is supossed to be used with YY-CHR editor? ( link ). If i divide every group of number in three section for RGB, all i have are black c...
- Tue Nov 06, 2018 12:55 am
- Forum: SNESdev
- Topic: blargg's SPC test ROMs
- Replies: 34
- Views: 30761
blargg's SPC test ROMs
Apparently byuu managed to find blargg's long-lost SPC test ROMs on an old thumb drive. They were posted to his board, but I figured somebody around here might be interested in them. - spc_dsp6.sfc - spc_mem_access_times.sfc - spc_spc.sfc - spc_timer.sfc Download mirror 1 Download mirror 2 I may pla...
- Thu Jun 21, 2018 12:24 pm
- Forum: GBDev
- Topic: Verilog MBC5
- Replies: 14
- Views: 11983
Re: Verilog MBC5
Here's a logic trace of OAM DMA that gekkio sent me that supports this. Normal memory accesses do seem to pulse /CS on each access though. Ah. Thank you. Just to clarify, I don't believe that trace was from a GBA, but from a DMG executing OAM DMA. So maybe it isn't directly relevant to your stateme...
- Tue Jun 19, 2018 1:17 pm
- Forum: GBDev
- Topic: Verilog MBC5
- Replies: 14
- Views: 11983
Re: Verilog MBC5
Other that timing difference, at least on DMG, there's no functional difference between (/CS=0 AND A14=0) and (A[15..13]='b'101). I'm just telling you what I have found from my MBC5 test bench. A15 and A13 are ignored by the /RAMCS decoder. Enabling RAM Loading address $0000, /CS LOW SRAM /CS Statu...
- Mon Jun 18, 2018 11:45 pm
- Forum: GBDev
- Topic: Verilog MBC5
- Replies: 14
- Views: 11983
Re: Verilog MBC5
A couple of issues I see from my own testing, the ROM bank should be set to 1 on reset, not 0, and the ram enable decoding isn't quite right. You forgot to include the not_cs input, and the decoding actually only cares that A14 is low (rather than A15:13 = 101). assign out_ram_enable = cs || !ram_en...
- Mon Jun 18, 2018 4:46 pm
- Forum: SNESdev
- Topic: Megaman X3 Project Zero
- Replies: 20
- Views: 20581
Re: Megaman X3 Project Zero
I wonder if it might be possible to reduce the wiring by just disconnecting the high address line from the Cx4 and feeding that directly into the ROM chip (so the Cx4 thinks it's always within the 16Mbit memory space and doesn't tri-state the data lines).
- Fri Jun 15, 2018 10:36 am
- Forum: SNESdev
- Topic: Megaman X3 Project Zero
- Replies: 20
- Views: 20581
Re: Megaman X3 Project Zero
Id bet its this standard 40 pin one. First time seeing one personally. [That's a bit big for a "tiny" pic --MOD] This pinout is almost correct, but /CS and /RD are swapped (a lot of pinouts you find online get them backwards because Nintendo likes to play fast and loose with those two signals on th...
- Mon May 28, 2018 2:50 pm
- Forum: SNESdev
- Topic: Megaman X3 Project Zero
- Replies: 20
- Views: 20581
Re: Megaman X3 Project Zero
The surface mount MaskROMs on Cx4 and GSU boards have the same pinout as the through-hole MaskROMs on most carts, for both the 32 and 36 pin packages. For some reason, Sharp used the LH538 part number for some SNES MaskROMs as well as Game Boy ones, but the pinouts are NOT the same between them. Her...
- Thu Nov 23, 2017 4:18 pm
- Forum: SNESdev
- Topic: How to debug custom sd2snes fw? (Possible n00b question)
- Replies: 9
- Views: 5704
Re: How to debug custom sd2snes fw? (Possible n00b question)
I'm pretty sure ikari has said that the SD2SNES's built-in RTC is actually based on the SPC7110, so you can probably use that instead of reinventing the wheel...