Search found 10 matches

by JonteP
Thu Nov 07, 2019 8:42 am
Forum: NESdev
Topic: VRC5
Replies: 43
Views: 27173

Re: VRC5

Finally got VRC5 emulation to work. Maybe this is already known, or I'm misunderstanding the issue, but from glancing at different code implementations, it seems that how the VRC5 determines whether the fetched tile is BG or Sprite is unkown. I just assumed that it listens to PPU A12 and that games ...
by JonteP
Tue Oct 29, 2019 4:56 am
Forum: NES Music
Topic: VRC7 audio emulator
Replies: 3
Views: 7148

Re: VRC7 audio emulator

Hi everyone! I recently spend a lot of time looking at the vrc7 die photo and started writing an emulator for it. It is written in C, with the aim of being somewhat compatible with emu2413. All testing was done with NSFPlay and the Lagrange Point nsf. Some songs still sound slightly off compared to...
by JonteP
Sat Sep 08, 2018 1:57 am
Forum: NESemdev
Topic: NOP interrupt polling
Replies: 17
Views: 13377

Re: NOP interrupt polling

; A taken non-page-crossing branch ignores IRQ during ; its last clock, so that next instruction executes ; before the IRQ. Other instructions would execute the ; NMI before the next instruction. Wow, this is the first I've heard of IRQ and NMI differing in behaviour, particularly tied to specific ...
by JonteP
Fri Sep 07, 2018 11:42 am
Forum: NESemdev
Topic: NOP interrupt polling
Replies: 17
Views: 13377

Re: NOP interrupt polling

( INTs = NMI and IRQ acknowledgement) 1. There are different NOPs due to the different addressing modes. You're (probably) taking opcode $EA as NOP. The quick answer here is YES - you should poll INTs normally. 2. If branch is taken, the 3rd cycle is executed without polling INTs. If the page was c...
by JonteP
Thu Sep 06, 2018 10:54 pm
Forum: NESemdev
Topic: NOP interrupt polling
Replies: 17
Views: 13377

NOP interrupt polling

I'm sorry if this is something obvious, but I couldn't find any information about this. I was failing Blargg's ppu_vbl_nmi test suite #8: nmi_off_timing. (here nmi is disabled right before vblank and the test checks whether NMI triggers) I noticed that I could pass this by not polling for interrupts...
by JonteP
Tue Aug 21, 2018 12:37 pm
Forum: NESemdev
Topic: NMI timing
Replies: 8
Views: 8285

Re: NMI timing

According to my log above, NMI is triggered at scanline 241 (first vblank scanline) dot 1. Is that wrong? You know about the CPU-PPU alignment, right? Well, during my tests, I had to request NMI 1 PPU cycle earlier. In other words, at line 240 cycle 341. Technically, it would be the same , but I cl...
by JonteP
Thu Aug 16, 2018 11:47 pm
Forum: NESemdev
Topic: NMI timing
Replies: 8
Views: 8285

Re: NMI timing

According to my log above, NMI is triggered at scanline 241 (first vblank scanline) dot 1. Is that wrong?
by JonteP
Thu Aug 16, 2018 4:21 am
Forum: NESemdev
Topic: NMI timing
Replies: 8
Views: 8285

Re: NMI timing

Thanks, Zepper! I don't think this has to do with NMI suppression. This is testing the number of instructions between NMI trigger and the NMI instruction. Seems that shifting back NMI polling a couple ppu cycles fixes this, and I pass that whole test suite now. I also played through stage 2 in Battl...
by JonteP
Tue Aug 14, 2018 9:06 am
Forum: NESemdev
Topic: NMI timing
Replies: 8
Views: 8285

Re: NMI timing

zeroone wrote:Does Nintendulator pass that particular test?
I'll be sure to check that out!

I found that I can pass the test by polling NMI 2 ppu cycles earlier. Basically I was polling it at the first ppu cycle of the last CPU cycle of the instruction. Not sure if this is a hack or proper fix though....
by JonteP
Tue Aug 14, 2018 5:46 am
Forum: NESemdev
Topic: NMI timing
Replies: 8
Views: 8285

NMI timing

Hi all! So, I'm writing yet another NES emulator, for my own amusement and learning purposes. I've got most of the basic stuff working and decided to dive into some log standing timing issues. I'm currently failing blargg's NMI timing test (05-nmi_timing, from ppu_vbl_nmi test suite). Each loop of m...