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PostPosted: Fri Feb 02, 2018 7:51 am 
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I have a really long subroutine handling enemy animation and AI at once. This fragment moves enemies.
Code:
MoveEnemy:
  DEC Mob8Steps - 1, x

  LDA Mob8Direction - 1, x
  CMP #Mob_Dir_South
  BNE +
  INC EnemyRam, y
  RTS
  +
  CMP #Mob_Dir_North
  BNE +
  DEC EnemyRam, y
  RTS
  +
  CMP #Mob_Dir_East
  BNE +
  INC EnemyRam + 3, y
  RTS
  +
  ;;;west
  DEC EnemyRam + 3, y
  RTS


For some reason anywhere I try to use y register when addressing (INC EnemyRam + 3, y, STX EnemyRam + 3, y etc.) I get an error. I have to do it like this and it's completely redundant:

Code:
 
  DEC Mob8Steps - 1, x
 
  LDA Mob8Direction - 1, x
  CMP #Mob_Dir_South
  BNE +
  TYA
  TAX
  INC EnemyRam, x
  JMP AnimateEnemyUpdateRegisters
  +
  CMP #Mob_Dir_North
  BNE +
  TYA
  TAX
  DEC EnemyRam, x
  JMP AnimateEnemyUpdateRegisters
  +
  CMP #Mob_Dir_East
  BNE +
  TYA
  TAX
  INC EnemyRam + 3, x
  JMP AnimateEnemyUpdateRegisters
  +
  ;;;west
  TYA
  TAX
  DEC EnemyRam + 3, x
  JMP AnimateEnemyUpdateRegisters


What's wrong?


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PostPosted: Fri Feb 02, 2018 8:01 am 
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Some instructions (including INC and DEC) have an absolute X addressing mode but not absolute Y. It's just the way the 6502 is.

I recommend keeping this 6502 reference page bookmarked, to be able to quickly check what addressing modes each instruction supports (and how many clock cycles)

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PostPosted: Fri Feb 02, 2018 8:07 am 
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Posts: 359
For some strange reason the unofficial instructions isc and dcp have ',y' addressing modes even though inc and dec do not. You can use isc and dcp here if you don't mind being a 6502 bad boy and breaking compat on some emulators.


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PostPosted: Fri Feb 02, 2018 8:09 am 
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Posts: 20562
Location: NE Indiana, USA (NTSC)
pubby ninja'd me, but I'll post anyway because I have a link:

The read-modify-write instructions (ASL, LSR, ROL, ROR, INC, DEC) have dd,X and aaaa,X modes but not aaaa,Y, (dd),Y, or (dd,X). If you're not planning to reuse the code on any 65C02 or 65816 platform (Lynx, TG16, or Super NES), you could try the unofficial RMW+ALU instructions, which have all the modes that STA has.


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PostPosted: Fri Feb 02, 2018 9:21 am 
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Are they available on ASM6? It still gives me that illegal instruction error.


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PostPosted: Fri Feb 02, 2018 9:34 am 
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Posts: 20562
Location: NE Indiana, USA (NTSC)
If you were using ca65, you'd use .setcpu "6502X" before any RMW+ALU instructions. For ASM6, you may have to edit the assembler's source code and recompile it to enable support. Or make macros in your assembly language source code that emit byte statements.


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PostPosted: Sat Feb 03, 2018 8:37 am 
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Location: Stockholm, Sweden
There is a fork of asm6 which does support illegal opcodes. It is called asm6f


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PostPosted: Sat Feb 03, 2018 10:20 am 
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With standard asm6 you could make macros (I think, I'm away from my computer)...

Or else put in a .byte .db command and just use the hex value of the illegal opcode.

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