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 Post subject: m == 1, n and z?
PostPosted: Sat Apr 01, 2006 3:49 pm 
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Location: Argentina
When the 65816 is in mem/reg 8 bits and a LDA is done, does the processor change the n and z flags? i mean:

nvalue : 8 bits

Code:
if (nvalue == 0)
   z = 1 ;
else
   z = 0;

if (nvalue & 0x80)
    n = 1;
else
   n = 0;


thxs.

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 Post subject:
PostPosted: Sat Apr 01, 2006 4:00 pm 
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In 16-bit mode, N is set based on bit 15.


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PostPosted: Sat Apr 01, 2006 5:23 pm 
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but when m == 1 (8 bits), the N flag is based on bit 7?.. i think is the racional thing.

Sorry i dont know if this post goes in the newbie forum.

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PostPosted: Sat Apr 01, 2006 7:18 pm 
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Anes wrote:
but when m == 1 (8 bits), the N flag is based on bit 7?.. i think is the racional thing.

It's not always based on bit 7; more generally, it's based on the most significant bit of the result. On the 65c816, this can be bit 7 of an 8-bit result or bit 15 of a 16-bit result depending on the mode bits (M, X, E). On the ARM architecture (a 32-bit RISC CPU based on design principles and opcode mnemonics similar to those of 6502), it's bit 31.

Quote:
Sorry i dont know if this post goes in the newbie forum.

As I understand it, the newbie forum is for NES, which doesn't have a 16-bit mode.


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PostPosted: Sun Apr 02, 2006 12:33 am 
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ok, thanks. Last question:

if x == 1 (8 bits index registers) and m == 0, when doing an instruction that uses indirect addressing does it uses the low 8 bit of register x/y?
And viceversa i mean if (x == 0) and (m == 1) does it uses the full 16 bit index registers and load an 8 bit value into the accumulator/write to memory?

thanks again.

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PostPosted: Sun Apr 02, 2006 1:07 am 
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Location: Chexbres, VD, Switzerland
As I understand, yes, since the index registers are 16-bit, the indexed instruction are adressed on 16-bits regardless of the acumulator's size.
By my own, I ask what happen what happens if tax or tay is met on the exact same situation. tya or txa won't cause problems, becuase only the low 8-bit will be copied. But in the other way arround, I just imagine the 8 high bit of the destination register are zeros, or they come from the phantom B register ?

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