Given that the SPC700 is so similar to a 6502, why hasn't anybody written an SPC700 assembler that takes 6502 style mnemonics and spits out SPC700 object code?mozz wrote:I'll try and figure out the other 105 opcodes later (taking a short detour to try and get my SPC700 info into a similar format).

## SPC700 asm using 6502 style mnemonics?

**Moderator:** Moderators

It's nottepples wrote:Given that the SPC700 is so similar to a 6502, why hasn't anybody written an SPC700 assembler that takes 6502 style mnemonics and spits out SPC700 object code?mozz wrote:I'll try and figure out the other 105 opcodes later (taking a short detour to try and get my SPC700 info into a similar format).

*that*similar. The SPC700 has lots of weird addressing modes that are nothing like the 6502. 6502 mnemonics might be too limiting.

Here are a couple of examples (ignore the bogus formatting, I copied them from some code I'm working on):

Code: Select all

```
"AF: MOV (X)+, A : 1 : 4 : ", // (X++) = A (no read) ........
"C6: MOV (X), A : 1 : 4 : ", // (X) = A (read) ........
"FB: MOV Y, d+X : 2 : 4 : ", // Y = (d+X) N.....Z.
"EC: MOV Y, !a : 3 : 4 : ", // Y = (a) N.....Z.
"FA: MOV dd, ds : 3 : 5 : ", // (dd) = (ds) (no read) ........
```

The 65C816 introduced a few strange modes such as (d,s),y stack frame addressing, yet the assembly language stayed true to the 6502 roots. Even the ARM architecture looks as if it were written by people brought up on the 6502. (Reason: ARM was started by the people who built the 6502 based BBC Micro.)mozz wrote:The SPC700 has lots of weird addressing modes that are nothing like the 6502. 6502 mnemonics might be too limiting.

AF: STA 0,X++Here are a couple of examples (ignore the bogus formatting, I copied them from some code I'm working on):Code: Select all

`"AF: MOV (X)+, A : 1 : 4 : ", // (X++) = A (no read) ........ "C6: MOV (X), A : 1 : 4 : ", // (X) = A (read) ........ "FB: MOV Y, d+X : 2 : 4 : ", // Y = (d+X) N.....Z. "EC: MOV Y, !a : 3 : 4 : ", // Y = (a) N.....Z. "FA: MOV dd, ds : 3 : 5 : ", // (dd) = (ds) (no read) ........`

C6: STA 0,X

FB: LDY $12,X

EC: LDY $1234

FA: For this, I'd keep the MOV syntax.

You know, I can't imagine why I ever thought the SPC700 was based on a 6502. It might have a similar ALU, and they may have similar mnemonics for some of the opcodes, but other than that the instruction sets don't resemble each other at all.tepples wrote:Given that the SPC700 is so similar to a 6502, why hasn't anybody written an SPC700 assembler that takes 6502 style mnemonics and spits out SPC700 object code?

I have a debug method in my code generation thingy that prints out a table. Here's the tables it prints for SPC700 and NMOS 6502:

Code: Select all

```
SPC700InstructionSet:
{
NOP, CLRP, SETP, CLRC, SETC, EI, DI, CLRV, My addressing mode abbreviations
TCALL, TCALL, TCALL, TCALL, TCALL, TCALL, TCALL, TCALL, --------------------------------
SET1_d, SET1_d, SET1_d, SET1_d, SET1_d, SET1_d, SET1_d, SET1_d, m = Absolute
BBS_d_r, BBS_d_r, BBS_d_r, BBS_d_r, BBS_d_r, BBS_d_r, BBS_d_r, BBS_d_r, mx = Absolute Indexed X
OR_a_d, AND_a_d, EOR_a_d, CMP_a_d, ADC_a_d, SBC_a_d, MOV_d_a, MOV_a_d, my = Absolute Indexed Y
OR_a_m, AND_a_m, EOR_a_m, CMP_a_m, ADC_a_m, SBC_a_m, MOV_m_a, MOV_a_m, imm = Immediate
OR_a_ix, AND_a_ix, EOR_a_ix, CMP_a_ix, ADC_a_ix, SBC_a_ix, MOV_ix_a, MOV_a_ix, ix = X Indirect
OR_a_idx, AND_a_idx,EOR_a_idx,CMP_a_idx,ADC_a_idx,SBC_a_idx,MOV_idx_a,MOV_a_idx, ixi = X Indirect++
OR_a_imm, AND_a_imm,EOR_a_imm,CMP_a_imm,ADC_a_imm,SBC_a_imm,CMP_x_imm,MOV_a_imm, iy = Y Indirect
OR_d_d, AND_d_d, EOR_d_d, CMP_d_d, ADC_d_d, SBC_d_d, MOV_m_x, MOV_x_m, a = A
OR1_c_b, OR1_c_nb, AND1_c_b, AND1_c_nb,EOR1_c_b, MOV1_c_b, MOV1_b_c, NOT1_b, c = Carry flag
ASL_d, ROL_d, LSR_d, ROR_d, DEC_d, INC_d, MOV_d_y, MOV_y_d, p = PSW
ASL_m, ROL_m, LSR_m, ROR_m, DEC_m, INC_m, MOV_m_y, MOV_y_m, sp = SP
PUSH_p, PUSH_a, PUSH_x, PUSH_y, MOV_y_imm,CMP_y_imm,MOV_x_imm,NOTC, x = X
TSET1_m, CBNE_d_r, TCLR1_m, DBNZ_d_r, POP_p, POP_a, POP_x, POP_y, y = Y
BRK, BRA_r, PCALL, RET, MOV_d_imm,MOV_ixi_a,MUL_ya, SLEEP, ya = YA
BPL_r, BMI_r, BVC_r, BVS_r, BCC_r, BCS_r, BNE_r, BEQ_r, imx = JMP Absolute Indexed Indirect
TCALL, TCALL, TCALL, TCALL, TCALL, TCALL, TCALL, TCALL, idx = Direct Indexed X (RMW)
CLR1_d, CLR1_d, CLR1_d, CLR1_d, CLR1_d, CLR1_d, CLR1_d, CLR1_d, diy = Direct
BBC_d_r, BBC_d_r, BBC_d_r, BBC_d_r, BBC_d_r, BBC_d_r, BBC_d_r, BBC_d_r, d = Direct
OR_a_dx, AND_a_dx, EOR_a_dx, CMP_a_dx, ADC_a_dx, SBC_a_dx, MOV_dx_a, MOV_a_dx, dx = Direct Indexed X
OR_a_mx, AND_a_mx, EOR_a_mx, CMP_a_mx, ADC_a_mx, SBC_a_mx, MOV_mx_a, MOV_a_mx, dy = Direct Indexed Y
OR_a_my, AND_a_my, EOR_a_my, CMP_a_my, ADC_a_my, SBC_a_my, MOV_my_a, MOV_a_my, d = Test-and-Branch Direct
OR_a_diy, AND_a_diy,EOR_a_diy,CMP_a_diy,ADC_a_diy,SBC_a_diy,MOV_diy_a,MOV_a_diy, d = Direct Destination (d_d)
OR_d_imm, AND_d_imm,EOR_d_imm,CMP_d_imm,ADC_d_imm,SBC_d_imm,MOV_d_x, MOV_x_d, d = Direct Source (d_d)
OR_ix_iy, AND_ix_iy,EOR_ix_iy,CMP_ix_iy,ADC_ix_iy,SBC_ix_iy,MOV_dy_x, MOV_x_dy, nb = MemBit
DECW_d, INCW_d, CMPW_ya_d,ADDW_ya_d,SUBW_ya_d,MOVW_ya_d,MOVW_d_ya,MOV_d_d, b = MemBit
ASL_dx, ROL_dx, LSR_dx, ROR_dx, DEC_dx, INC_dx, MOV_dx_y, MOV_y_dx, r = PC relative
ASL_a, ROL_a, LSR_a, ROR_a, DEC_a, INC_a, DEC_y, INC_y, impl = implied
DEC_x, INC_x, MOV_x_a, MOV_a_x, MOV_x_sp, MOV_sp_x, MOV_a_y, MOV_y_a,
CMP_x_m, CMP_x_d, CMP_y_m, CMP_y_d, DIV_ya_x, DAS_a, CBNE_dx_r,DBNZ_y_r,
JMP_imx, CALL_m, JMP_m, RET1, XCN_a, MOV_a_ixi,DAA_a, STOP,
}
N6502InstructionSet:
{
BRK, JSR_a, RTI, RTS, SKB_imm, LDY_imm, CPY_imm, CPX_imm, My addressing mode abbreviations
ORA_dxi, AND_dxi, EOR_dxi, ADC_dxi, STA_dxi, LDA_dxi, CMP_dxi, SBC_dxi, --------------------------------
HLT, HLT, HLT, HLT, SKB_imm, LDX_imm, SKB_imm, SKB_imm, diy = (Indirect),Y
SLO_dxi, RLA_dxi, SRE_dxi, RRA_dxi, SAX_dxi, LAX_dxi, DCP_dxi, ISC_dxi, dxi = (Indirect,X)
SKB_d, BIT_d, SKB_d, SKB_d, STY_d, LDY_d, CPY_d, CPX_d, a = Absolute
ORA_d, AND_d, EOR_d, ADC_d, STA_d, LDA_d, CMP_d, SBC_d, ax = Absolute,X
ASL_d, ROL_d, LSR_d, ROR_d, STX_d, LDX_d, DEC_d, INC_d, ay = Absolute,Y
SLO_d, RLA_d, SRE_d, RRA_d, SAX_d, LAX_d, DCP_d, ISC_d, acc = Accumulator
PHP, PLP, PHA, PLA, DEY, TAY, INY, INX, imm = Immediate
ORA_imm, AND_imm, EOR_imm, ADC_imm, SKB_imm, LDA_imm, CMP_imm, SBC_imm, impl = Implied
ASL_acc, ROL_acc, LSR_acc, ROR_acc, TXA, TAX, DEX, NOP, ai = Indirect
ANC_imm, ANC_imm, ALR_imm, ARR_imm, XAA_imm, OAL_imm, LXA_imm, SBC_imm, pcr = Relative
SKW_a, BIT_a, JMP_a, JMP_ai, STY_a, LDY_a, CPY_a, CPX_a, d = Zero Page
ORA_a, AND_a, EOR_a, ADC_a, STA_a, LDA_a, CMP_a, SBC_a, dx = Zero Page,X
ASL_a, ROL_a, LSR_a, ROR_a, STX_a, LDX_a, DEC_a, INC_a, dy = Zero Page,Y
SLO_a, RLA_a, SRE_a, RRA_a, SAX_a, LAX_a, DCP_a, ISC_a,
BPL_pcr, BMI_pcr, BVC_pcr, BVS_pcr, BCC_pcr, BCS_pcr, BNE_pcr, BEQ_pcr,
ORA_diy, AND_diy, EOR_diy, ADC_diy, STA_diy, LDA_diy, CMP_diy, SBC_diy,
HLT, HLT, HLT, HLT, HLT, HLT, HLT, HLT,
SLO_diy, RLA_diy, SRE_diy, RRA_diy, SHA_diy, LAX_diy, DCP_diy, ISC_diy,
SKB_dx, SKB_dx, SKB_dx, SKB_dx, STY_dx, LDY_dx, SKB_dx, SKB_dx,
ORA_dx, AND_dx, EOR_dx, ADC_dx, STA_dx, LDA_dx, CMP_dx, SBC_dx,
ASL_dx, ROL_dx, LSR_dx, ROR_dx, STX_dy, LDX_dy, DEC_dx, INC_dx,
SLO_dx, RLA_dx, SRE_dx, RRA_dx, SAX_dy, LAX_dy, DCP_dx, ISC_dx,
CLC, SEC, CLI, SEI, TYA, CLV, CLD, SED,
ORA_ay, AND_ay, EOR_ay, ADC_ay, STA_ay, LDA_ay, CMP_ay, SBC_ay,
NOP, NOP, NOP, NOP, TXS, TSX, NOP, NOP,
SLO_ay, RLA_ay, SRE_ay, RRA_ay, SHS_ay, LAS_ay, DCP_ay, ISC_ay,
SKW_ax, SKW_ax, SKW_ax, SKW_ax, SHY_ax, LDY_ax, SKW_ax, SKW_ax,
ORA_ax, AND_ax, EOR_ax, ADC_ax, STA_ax, LDA_ax, CMP_ax, SBC_ax,
ASL_ax, ROL_ax, LSR_ax, ROR_ax, SHX_ay, LDX_ay, DEC_ax, INC_ax,
SLO_ax, RLA_ax, SRE_ax, RRA_ax, SHA_ay, LAX_ay, DCP_ax, ISC_ax,
}
```

The branch instructions are in the same place? Not much else is.

Last edited by mozz on Wed Apr 26, 2006 7:35 pm, edited 1 time in total.

65C02:
SPC700:
It helps to compare them when they're arranged properly.

Code: Select all

```
columns count by D4,D3,D2
rows count by D0,D1,D7,D6,D5
xxx000xx xxx100xx xxx010xx xxx110xx xxx001xx xxx101xx xxx011xx xxx111xx
000xxx00 00:IMM:BRK 10:REL:BPL 08:IMP:PHP 18:IMP:CLC 04:ZPG:TSB 14:ZPG:TRB 0C:ABS:TSB 1C:ABS:TRB
001xxx00 20:ABS:JSR 30:REL:BMI 28:IMP:PLP 38:IMP:SEC 24:ZPG:BIT 34:ZPX:BIT 2C:ABS:BIT 3C:ABX:BIT
010xxx00 40:IMP:RTI 50:REL:BVC 48:IMP:PHA 58:IMP:CLI 44:---:--- 54:---:--- 4C:ABS:JMP 5C:---:---
011xxx00 60:IMP:RTS 70:REL:BVS 68:IMP:PLA 78:IMP:SEI 64:ZPG:STZ 74:ZPX:STZ 6C:IND:JMP 7C:INX:JMP
100xxx00 80:REL:BRA 90:REL:BCC 88:IMP:DEY 98:IMP:TYA 84:ZPG:STY 94:ZPX:STY 8C:ABS:STY 9C:ABS:STZ
101xxx00 A0:IMM:LDY B0:REL:BCS A8:IMP:TAY B8:IMP:CLV A4:ZPG:LDY B4:ZPX:LDY AC:ABS:LDY BC:ABX:LDY
110xxx00 C0:IMM:CPY D0:REL:BNE C8:IMP:INY D8:IMP:CLD C4:ZPG:CPY D4:---:--- CC:ABS:CPY DC:---:---
111xxx00 E0:IMM:CPX F0:REL:BEQ E8:IMP:INX F8:IMP:SED E4:ZPG:CPX F4:---:--- EC:ABS:CPX FC:---:---
000xxx10 02:---:--- 12:ZPI:ORA 0A:ACC:ASL 1A:ACC:INC 06:ZPG:ASL 16:ZPX:ASL 0E:ABS:ASL 1E:ABX:ASL
001xxx10 22:---:--- 32:ZPI:AND 2A:ACC:ROL 3A:ACC:DEC 26:ZPG:ROL 36:ZPX:ROL 2E:ABS:ROL 3E:ABX:ROL
010xxx10 42:---:--- 52:ZPI:EOR 4A:ACC:LSR 5A:IMP:PHY 46:ZPG:LSR 56:ZPX:LSR 4E:ABS:LSR 5E:ABX:LSR
011xxx10 62:---:--- 72:ZPI:ADC 6A:ACC:ROR 7A:IMP:PLY 66:ZPG:ROR 76:ZPX:ROR 6E:ABS:ROR 7E:ABX:ROR
100xxx10 82:---:--- 92:ZPI:STA 8A:IMP:TXA 9A:IMP:TXS 86:ZPG:STX 96:ZPY:STX 8E:ABS:STX 9E:ABX:STZ
101xxx10 A2:IMM:LDX B2:ZPI:LDA AA:IMP:TAX BA:IMP:TSX A6:ZPG:LDX B6:ZPY:LDX AE:ABS:LDX BE:ABY:LDX
110xxx10 C2:---:--- D2:ZPI:CMP CA:IMP:DEX DA:IMP:PHX C6:ZPG:DEC D6:ZPX:DEC CE:ABS:DEC DE:ABX:DEC
111xxx10 E2:---:--- F2:ZPI:SBC EA:IMP:NOP FA:IMP:PLX E6:ZPG:INC F6:ZPX:INC EE:ABS:INC FE:ABX:INC
000xxx01 01:INX:ORA 11:INY:ORA 09:IMM:ORA 19:ABY:ORA 05:ZPG:ORA 15:ZPX:ORA 0D:ABS:ORA 1D:ABX:ORA
001xxx01 21:INX:AND 31:INY:AND 29:IMM:AND 39:ABY:AND 25:ZPG:AND 35:ZPX:AND 2D:ABS:AND 3D:ABX:AND
010xxx01 41:INX:EOR 51:INY:EOR 49:IMM:EOR 59:ABY:EOR 45:ZPG:EOR 55:ZPX:EOR 4D:ABS:EOR 5D:ABX:EOR
011xxx01 61:INX:ADC 71:INY:ADC 69:IMM:ADC 79:ABY:ADC 65:ZPG:ADC 75:ZPX:ADC 6D:ABS:ADC 7D:ABX:ADC
100xxx01 81:INX:STA 91:INY:STA 89:IMM:BIT 99:ABY:STA 85:ZPG:STA 95:ZPX:STA 8D:ABS:STA 9D:ABX:STA
101xxx01 A1:INX:LDA B1:INY:LDA A9:IMM:LDA B9:ABY:LDA A5:ZPG:LDA B5:ZPX:LDA AD:ABS:LDA BD:ABX:LDA
110xxx01 C1:INX:CMP D1:INY:CMP C9:IMM:CMP D9:ABY:CMP C5:ZPG:CMP D5:ZPX:CMP CD:ABS:CMP DD:ABX:CMP
111xxx01 E1:INX:SBC F1:INY:SBC E9:IMM:SBC F9:ABY:SBC E5:ZPG:SBC F5:ZPX:SBC ED:ABS:SBC FD:ABX:SBC
000xxx11 03:---:--- 13:---:--- 0B:---:--- 1B:---:--- 07:ZPG:RMB0 17:ZPG:RMB1 0F:REL:BBR0 1F:REL:BBR1
001xxx11 23:---:--- 33:---:--- 2B:---:--- 3B:---:--- 27:ZPG:RMB2 37:ZPG:RMB3 2F:REL:BBR2 3F:REL:BBR3
010xxx11 43:---:--- 53:---:--- 4B:---:--- 5B:---:--- 47:ZPG:RMB4 57:ZPG:RMB5 4F:REL:BBR4 5F:REL:BBR5
011xxx11 63:---:--- 73:---:--- 6B:---:--- 7B:---:--- 67:ZPG:RMB6 77:ZPG:RMB7 6F:REL:BBR6 7F:REL:BBR7
100xxx11 83:---:--- 93:---:--- 8B:---:--- 9B:---:--- 87:ZPG:SMB0 97:ZPG:SMB1 8F:REL:BBS0 9F:REL:BBS1
101xxx11 A3:---:--- B3:---:--- AB:---:--- BB:---:--- A7:ZPG:SMB2 B7:ZPG:SMB3 AF:REL:BBS2 BF:REL:BBS3
110xxx11 C3:---:--- D3:---:--- CB:---:--- DB:---:--- C7:ZPG:SMB4 D7:ZPG:SMB5 CF:REL:BBS4 DF:REL:BBS5
111xxx11 E3:---:--- F3:---:--- EB:---:--- FB:---:--- E7:ZPG:SMB6 F7:ZPG:SMB7 EF:REL:BBS6 FF:REL:BBS7
```

Code: Select all

```
columns count by D4,D3,D2
rows count by D0,D1,D7,D6,D5
xxx000xx xxx100xx xxx010xx xxx110xx xxx001xx xxx101xx xxx011xx xxx111xx
000xxx00 00:IMP:NOP 10:REL:BPL 08:IMM:ORA 18:DPI:ORA 04:ZPG:ORA 14:ZPX:ORA 0C:ABS:ASL 1C:ACC:ASL
001xxx00 20:IMP:CLP 30:REL:BMI 28:IMM:AND 38:DPI:AND 24:ZPG:AND 34:ZPX:AND 2C:ABS:ROL 3C:ACC:ROL
010xxx00 40:IMP:SEP 50:REL:BVC 48:IMM:EOR 58:DPI:EOR 44:ZPG:EOR 54:ZPX:EOR 4C:ABS:LSR 5C:ACC:LSR
011xxx00 60:IMP:CLC 70:REL:BVS 68:IMM:CMP 78:DPI:CMP 64:ZPG:CMP 74:ZPX:CMP 6C:ABS:ROR 7C:ACC:ROR
100xxx00 80:IMP:SEC 90:REL:BCC 88:IMM:ADC 98:DPI:ADC 84:ZPG:ADC 94:ZPX:ADC 8C:ABS:DEC 9C:ACC:DEC
101xxx00 A0:IMP:CLI B0:REL:BCS A8:IMM:SBC B8:DPI:SBC A4:ZPG:SBC B4:ZPX:SBC AC:ABS:INC BC:ACC:INC
110xxx00 C0:IMP:SEI D0:REL:BNE C8:IMM:CPX D8:ZPG:STX C4:ZPG:STA D4:ZPX:STA CC:ABS:STY DC:IMP:DEY
111xxx00 E0:IMP:CLV F0:REL:BEQ E8:IMM:LDA F8:ZPG:LDX E4:ZPG:LDA F4:ZPX:LDA EC:ABS:LDY FC:IMP:INY
000xxx10 02:ZPG:RMB0 12:ZPG:SMB0 0A:BIT:OR 1A:ZPG:DEW 06:RGX:ORA 16:ABY:ORA 0E:ABS:SET1 1E:ABS:CPX
001xxx10 22:ZPG:RMB1 32:ZPG:SMB1 2A:BIT:ORI 3A:ZPG:INW 26:RGX:AND 36:ABY:AND 2E:REL:CBNE 3E:ZPG:CPX
010xxx10 42:ZPG:RMB2 52:ZPG:SMB2 4A:BIT:AND 5A:ZPG:CMW 46:RGX:EOR 56:ABY:EOR 4E:ABS:CLR1 5E:ABS:CPY
011xxx10 62:ZPG:RMB3 72:ZPG:SMB3 6A:BIT:ANDI 7A:ZPG:ADW 66:RGX:CMP 76:ABY:CMP 6E:REL:DBNZ 7E:ZPG:CPY
100xxx10 82:ZPG:RMB4 92:ZPG:SMB4 8A:BIT:EORC 9A:ZPG:SBW 86:RGX:ADC 96:ABY:ADC 8E:IMP:PLP 9E:IMP:DIV
101xxx10 A2:ZPG:RMB5 B2:ZPG:SMB5 AA:BIT:LDC BA:ZPG:LYA A6:RGX:SBC B6:ABY:SBC AE:IMP:PLA BE:IMP:DAS
110xxx10 C2:ZPG:RMB6 D2:ZPG:SMB6 CA:BIT:STC DA:ZPG:SYA C6:RGX:STA D6:ABY:STA CE:IMP:PLX DE:RLX:CBNE
111xxx10 E2:ZPG:RMB7 F2:ZPG:SMB7 EA:BIT:NOT FA:DDS:MOV E6:RGX:LDA F6:ABY:LDA EE:IMP:PLY FE:RLY:DBNZ
000xxx01 01:IMP:JST0 11:IMP:JST1 09:DDS:ORA 19:IXY:ORA 05:ABS:ORA 15:ABX:ORA 0D:IMP:PHP 1D:IMP:DEC
001xxx01 21:IMP:JST2 31:IMP:JST3 29:DDS:AND 39:IXY:AND 25:ABS:AND 35:ABX:AND 2D:IMP:PHA 3D:IMP:INX
010xxx01 41:IMP:JST4 51:IMP:JST5 49:DDS:EOR 59:IXY:EOR 45:ABS:EOR 55:ABX:EOR 4D:IMP:PHX 5D:IMP:TAX
011xxx01 61:IMP:JST6 71:IMP:JST7 69:DDS:CMP 79:IXY:CMP 65:ABS:CMP 75:ABX:CMP 6D:IMP:PHY 7D:IMP:TXA
100xxx01 81:IMP:JST8 91:IMP:JST9 89:DDS:ADC 99:IXY:ADC 85:ABS:ADC 95:ABX:ADC 8D:IMM:LDY 9D:IMP:TSX
101xxx01 A1:IMP:JSTA B1:IMP:JSTB A9:DDS:SBC B9:IXY:SBC A5:ABS:SBC B5:ABX:SBC AD:IMM:CPY BD:IMP:TXS
110xxx01 C1:IMP:JSTC D1:IMP:JSTD C9:ABS:STX D9:ZPY:STX C5:ABS:STA D5:ABX:STA CD:IMM:LDX DD:IMP:TYA
111xxx01 E1:IMP:JSTE F1:IMP:JSTF E9:ABS:LDX F9:ZPY:LDX E5:ABS:LDA F5:ABX:LDA ED:IMP:CPC FD:IMP:TAY
000xxx11 03:REL:BBS0 13:REL:BBR0 0B:ZPG:ASL 1B:ZPX:ASL 07:INX:ORA 17:INY:ORA 0F:IMP:BRK 1F:INX:JMP
001xxx11 23:REL:BBS1 33:REL:BBR1 2B:ZPG:ROL 3B:ZPX:ROL 27:INX:AND 37:INY:AND 2F:REL:BRA 3F:ABS:JSR
010xxx11 43:REL:BBS2 53:REL:BBR2 4B:ZPG:LSR 5B:ZPX:LSR 47:INX:EOR 57:INY:EOR 4F:IMP:JSP 5F:ABS:JMP
011xxx11 63:REL:BBS3 73:REL:BBR3 6B:ZPG:ROR 7B:ZPX:ROR 67:INX:CMP 77:INY:CMP 6F:IMP:RTS 7F:IMP:RTI
100xxx11 83:REL:BBS4 93:REL:BBR4 8B:ZPG:DEC 9B:ZPX:DEC 87:INX:ADC 97:INY:ADC 8F:DPI:MOV 9F:ACC:SWP
101xxx11 A3:REL:BBS5 B3:REL:BBR5 AB:ZPG:INC BB:ZPX:INC A7:INX:SBC B7:INY:SBC AF:RXI:STA BF:RXI:LDA
110xxx11 C3:REL:BBS6 D3:REL:BBR6 CB:ZPG:STY DB:ZPX:STY C7:INX:STA D7:INY:STA CF:IMP:MUL DF:IMP:DAA
111xxx11 E3:REL:BBS7 F3:REL:BBR7 EB:ZPG:LDY FB:ZPX:LDY E7:INX:LDA F7:INY:LDA EF:IMP:SLP FF:IMP:HLT
```

Quietust, QMT Productions

P.S. If you don't get this note, let me know and I'll write you another.

P.S. If you don't get this note, let me know and I'll write you another.

Edit: the origin of my "d", "dx" and "dy" abbreviations for Zero Page modes (as well as similar ones like "diy") is the "Direct Page" terminology used in the 65816. On the 65816 I used "a", "ax" etc. for Absolute addressing. On the SPC700 I ended up using "m" instead of "a" because its easier to keep track of its addressing modes if I name them explicitly after what happens with *both* operands, and I need "a" for the accumulator.

From the 65816, I mostly made my abbreviations by taking the first letter of each important word (except the word Indexed which I replace with the register letter) in the addressing mode name. E.g. "spcrl" comes from "Stack--PC Relative Long" and "dily" comes from "DirectPage Indirect Long Indexed Y" and "axi" comes from "JMP Absolute Indexed X Indirect". etc. For the other chips I tried to reuse the same abbreviations where possible, so I don't get too confused.

Same here. I learned to program in 6502 assembly on an Apple IIGS (65C816) first and older Apple II computers (6502 and 65C02) later.mozz wrote:the origin of my "d", "dx" and "dy" abbreviations for Zero Page modes (as well as similar ones like "diy") is the "Direct Page" terminology used in the 65816.

The official 65C816 datasheet published by WDC uses 'a' for absolute and 'A' for register A.On the 65816 I used "a", "ax" etc. for Absolute addressing. On the SPC700 I ended up using "m" instead of "a" because its easier to keep track of its addressing modes if I name them explicitly after what happens with *both* operands, and I need "a" for the accumulator.

Yup. I don't want to risk having a situation where I uppercase them or something and get them confused. With 6502/65816 I use "acc" or "accu" for Accumulator, but that isn't good for SPC700 because it would make some of my abbreviations way too long. 8)tepples wrote:The official 65C816 datasheet published by WDC uses 'a' for absolute and 'A' for register A.