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PostPosted: Thu Jun 30, 2016 10:45 pm 
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Joined: Mon Mar 27, 2006 5:23 pm
Posts: 1338
... there is no "the bus", there's a whole bunch of separate buses all over the place.

I get that there are ones of different importance levels, and this one's probably the most important, but yeah.


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PostPosted: Thu Jun 30, 2016 10:49 pm 
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Joined: Mon Jul 02, 2012 7:46 am
Posts: 759
Well, right. I know that. Same idea, but one for each bus.


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PostPosted: Fri Jul 01, 2016 4:31 am 
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Joined: Mon Nov 10, 2008 3:09 pm
Posts: 429
I like the bitmask idea for level-sensitive interrupt lines. For the SNES CPU IRQ you'd have one bit for the h/v counter, one bit for the cartridge slot and one bit for the expansion port.

Does higan emulate anything with an edge-sensitive interrupt line fed from multiple sources?


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