Introducing the VeriSNES (FPGA-based SNES)

Discussion of hardware and software development for Super NES and Super Famicom.

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Torlus
Posts: 3
Joined: Fri Oct 12, 2018 5:09 pm

Re: Introducing the VeriSNES (FPGA-based SNES)

Post by Torlus » Fri Oct 12, 2018 5:20 pm

Hi,

I just came across this topic, this VeriSNES project looks awesome!
I've written some FPGA cores too, especially SEGA Genesis/Megadrive, PC-Engine/TurboGrafx-16 (both in VHDL) and Atari Jaguar (Verilog).
See my site http://lvt.tl/ for more information, and my GitHub repos https://github.com/Torlus

Is there any way I could help, if needed ?
What about the current status of the project, especially licensing/source status (open or closed) ?

Regards,
Gregory

retrorgb
Posts: 10
Joined: Thu Oct 15, 2015 2:25 pm

Re: Introducing the VeriSNES (FPGA-based SNES)

Post by retrorgb » Sat Oct 13, 2018 4:47 am

Those are some impressive cores! Would you consider porting them to the MiSTer project?: https://github.com/MiSTer-devel/Main_MiSTer/wiki

Torlus
Posts: 3
Joined: Fri Oct 12, 2018 5:09 pm

Re: Introducing the VeriSNES (FPGA-based SNES)

Post by Torlus » Sat Oct 13, 2018 6:15 am

retrorgb wrote:Those are some impressive cores! Would you consider porting them to the MiSTer project?: https://github.com/MiSTer-devel/Main_MiSTer/wiki
Already done. ;) Except for the Atari Jaguar where the requirements are too high.

retrorgb
Posts: 10
Joined: Thu Oct 15, 2015 2:25 pm

Re: Introducing the VeriSNES (FPGA-based SNES)

Post by retrorgb » Sat Oct 13, 2018 6:50 am

Wow, thank you! Too bad about the Jag! I wonder if it's powerful enough to run a SNES core as well?

Torlus
Posts: 3
Joined: Fri Oct 12, 2018 5:09 pm

Re: Introducing the VeriSNES (FPGA-based SNES)

Post by Torlus » Sat Oct 13, 2018 11:26 am

retrorgb wrote:Wow, thank you! Too bad about the Jag! I wonder if it's powerful enough to run a SNES core as well?
As the Genesis/Megadrive core works, I’d say yes.
However, this will remain a supposition until I can see the source code.

syboxez
Posts: 32
Joined: Tue Mar 01, 2016 8:22 pm

Re: Introducing the VeriSNES (FPGA-based SNES)

Post by syboxez » Sat Oct 13, 2018 1:11 pm

retrorgb wrote:Wow, thank you! Too bad about the Jag! I wonder if it's powerful enough to run a SNES core as well?
Yes it is. The Super NT's FPGA is approximately half the size of the one in the MiSTer, and VeriSNES has already been ported to the MiSTer: https://www.youtube.com/watch?v=7ae5iUe8diY

cacophony
Posts: 4
Joined: Tue Aug 23, 2016 6:14 pm

Re: Introducing the VeriSNES (FPGA-based SNES)

Post by cacophony » Mon Oct 29, 2018 11:04 am

jwdonal, can you reconsider releasing the source for the benefit of MiSTer and other future community driven FPGA solutions? From a preservation perspective it would be of large benefit, and you might even make some money from your goodwill if you also have a patreon account.

And with the open source SD2SNES now supporting pretty much all the desired special chip games, there could presumably be a single device FPGA solution to playing essentially all of the SNES library (as I'm sure somebody would port that code to the MiSTer).

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Reed Solomon
Posts: 7
Joined: Wed Dec 01, 2010 9:43 pm

Re: Introducing the VeriSNES (FPGA-based SNES)

Post by Reed Solomon » Thu Nov 15, 2018 3:48 pm

Torlus wrote:
retrorgb wrote:Those are some impressive cores! Would you consider porting them to the MiSTer project?: https://github.com/MiSTer-devel/Main_MiSTer/wiki
Already done. ;) Except for the Atari Jaguar where the requirements are too high.
That may not be the case. There are people like ElectronAsh working on porting your Jaguar core to mister. Maybe check it out and see how it's going?

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