VeriSNES shows promise in this regard, however keep in mind that:
1. The way the FPGA NES projects work are not 100% accurate (tiny underclock by 0.164167% (60.098 to 60)) for speed to avoid creating latency in upscale, this may also be true for SNES
2. The SNES interfaces are 5V, while FPGA's are not, thus level shifters are required on the cartridge interface, controllers and expansion interface (if a real expansion device is used.) So it is not known yet if it will work with expansion-chip games.
3. When paired with a SD2SNES, there's not yet a way to pass digital audio through the FPGA to avoid having to add an ADC. For things like the Super Gameboy and various "run X console games on your SNES" add-ons that ADC would still need to be present. The easiest solution, really, is for the SD2SNES to identify that it is running on VeriSNES and somehow pass the audio digitally when audio is being generated on the chip (MSU-1) instead of in Analog form. This would require that both projects collaborate. An alternate option is to simply implement the SD2SNES in the same FPGA, though at that point, may as well just tick every line on the wishlist and pick a FPGA capable of emulating the SA-1 as well.
The HDMI NES projects also picked as low-powered FPGA's as possible, and thus getting 1080p out of one project is impossible, while the other can do it, but costs twice as much. So this has some interesting implications for a SNES. If you want to support 720p only and no expansion-chip games, a much cheaper FPGA may be usable. But if you want to support expansion chips, and all resolutions (720p, 1080p, 2160p, 4320p, etc) without adding a lag-inducing framebuffer, a much more expensive FPGA would be required that has more block memory in the FPGA itself.
VeriSNES is being developed on a Terasic DE2-115 which costs around $600 (Cyclone IV FPGA with 114,480 Logic Elements and 3.9Mbits of RAM), someone who previously used the exact same board http://pgate1.at-ninja.jp/SNES_on_FPGA/rpt_DE2-115.htm
fit the SNES into 28,417 LE's and 2,141,376 bits of Memory. But this doesn't include creating a HDMI interface.
The EP4CE115F29C7 alone costs 426.70 each, and are no longer stocked by various electronics places. The minimum FPGA that would fit the SNES as per that fitting report without taking into account the extra needed HDMI interface is EP4CE55F23C8N (Cyclone IV E) which costs $115.40
So minimally, it is looking like 115.40 a FPGA to emulate the SNES chips. Assuming you could acquire the controller ports and shielded cartridge interface cheaply. The OSCC (aka x-RGB) uses a EP4CE55F23C8N (15408 LE, 516096 Bits RAM) which costs 23.14. So it's likely this can all be done in the same FPGA. You still need chips for firmware to load the FPGA.