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Do you think of VRAM in terms of...
Byte address 21%  21%  [ 3 ]
Word address 79%  79%  [ 11 ]
Total votes : 14
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PostPosted: Sat Oct 21, 2017 7:36 am 
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So right now I'm working on a few example programs for the first release of my framework. It has some imperfections here and there, but one bit that really bothers me right now is the style of VRAM address. The macros I'm using for load-time VRAM transfers use word addresses, and so do the VRAM address registers of course. However, bsnes-plus and the constants I wrote for deciding VRAM address use byte addresses. Somewhere I'm going to need to make both the macro and the constants use the same style of address.

Currently I'm leaning toward word address but I'd like to hear what others think.

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PostPosted: Sat Oct 21, 2017 10:12 am 
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Wow, a unanimous majority voted for word address!


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PostPosted: Sat Oct 21, 2017 10:19 am 
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psycopathicteen wrote:
Wow, a unanimous majority voted for word address!
There isn't enough votes yet for that.

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PostPosted: Sat Oct 21, 2017 6:34 pm 
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Hmm, 9 to 1. Well, that was easy enough. Thanks everyone!

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PostPosted: Sun Oct 22, 2017 9:31 am 
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Except for the (damning!) fact that the VRAM data port register use word addressing, I see little reason to think about addresses in VRAM as word[n], when I think of any other address ever as byte[n].


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PostPosted: Sun Oct 22, 2017 1:31 pm 
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Ignoring mode 7, everything else in the S-PPU works with 16-bit words: both RAMs have the same address.

It made things a lot easier for me (who is, admittedly, coming to this from the point of view of an EE) when I realized not only how the various offset registers in the S-PPU could literally be mapped to address pins on the RAM, but how they were almost all nicely aligned within:

$2101: [...aaBBB] where BBB is literally PPU RAM A15, A14, A13
$2107(8,9,a): [CCCCCC..] and CCCCCC is literally PPU RAM A15, A14, A13, A12, A11, A10
$210b(c): [DDDDEEEE] and both DDDD and EEEE are literally PPU RAM A15, A14, A13, A12

$2107/8/9/a are conveniently aligned to a multiple of 256; you can literally throw away the lower byte (and mask two bits out of the upper byte) and use it, if you're starting with word addresses.
both $210b/c are half nice (the upper nybble is again conveniently aligned) but the lower nybble requires more massaging.

If not for the repeatedly present and unconnected PPU RAM A15, the distinction wouldn't have clicked so strongly for me.


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