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PostPosted: Wed Dec 06, 2017 1:42 pm 
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Joined: Thu Oct 26, 2017 12:29 pm
Posts: 6
Hi. I'm trying to figure this out.

So I:
1. Set the bit 5 at $4200 for vertical interrupt
2. Set the line to stop at $4209-a
3. Then in the irq handler subroutine, I read $4211,
"and #$80" until it is zero?

This gets me a blank screen.

Thank you for your help in advance.


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PostPosted: Wed Dec 06, 2017 1:48 pm 
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Joined: Sun Apr 13, 2008 11:12 am
Posts: 6646
Location: Seattle
4211h - TIMEUP - H/V-Timer IRQ Flag (R) (Read/Ack)
Code:
  7     H/V-Count Timer IRQ Flag (0=None, 1=Interrupt Request)
  6-0   Not used

The IRQ flag is automatically reset after reading from this register (except when reading at the very time when the IRQ condition is true (which lasts for 4-8 master cycles), then the CPU receives bit7=1, but register bit7 isn't cleared). The flag is also automatically cleared when disabling IRQs (by setting 4200h.Bit5-4 to zero).
Unlike NMI handlers, IRQ handlers MUST acknowledge IRQs, otherwise the IRQ gets executed again (ie. immediately after the RTI opcode).


Also, are you using a debugging emulator?


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