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PostPosted: Sat Aug 18, 2018 7:12 pm 
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According to the SNES manual, for HiROM, the cartridge SRAM is located in banks 0x30 to 0x3F, offset 0x6000 to 0x7FFF. This implies BA4 and 5 are 1, BA6 is 0, A13 and 14 are 1, and A15 is 0.

But the MAD-1 chip doesn't have any connection to BA4 at all, making the banks for SRAM go from 0x20 to 0x3F. I've also confirmed this on a HiROM board that uses an LS139 decoder.

Does the SNES care if the SRAM is active during that memory region, and if so, why? Thanks for the help!

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PostPosted: Sat Aug 18, 2018 7:17 pm 
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Some boards decode using BA5 (A21), some decode using BA4 (A20).

http://problemkaputt.de/fullsnes.htm#sn ... nd500games

One board (pedantically mode $25 ("ExHi") instead of $21 ("Hi") ) decodes using BA7 (A23).


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PostPosted: Sat Aug 18, 2018 7:21 pm 
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Say a program reads and writes cart SRAM only at the canonical addresses $306000-$307FFF, $316000-$317FFF, ..., $3F6000-$3F7FFF, and never reads or writes $206000-$207FFF, $216000-$217FFF, ..., $2F6000-$2F7FFF. In this situation, the fact that cart SRAM is mirrored down to $2x6000-$2x7FFF has no effect. It's like the mirroring of NES CPU RAM from $0000-$07FF up to $0800-$1FFF or the mirroring of NES PPU I/O from $2000-$2007 up to $2008-$3FFF.*


* Except for NES/FC region detection using $3F16-$3F17.


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PostPosted: Sat Aug 18, 2018 7:31 pm 
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Well, that's all fine - I assumed the SNES didn't care, since the boards I have in front of me map starting at 0x20 - I just wasn't sure why this wouldn't be explained or mentioned in the official manual. I found some inaccurate information on a few sites that came up on page 1 Google searches, so I was trying to rely on the manual rather than (possibly inaccurate) findings on the internet.

But thanks for the information! And for the fast replies!


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PostPosted: Sat Aug 18, 2018 7:42 pm 
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I guess part of it is Nintendo only wanting to support what's in the manual, not the unofficial behaviors, in case it has to revise the behavior of cartridge PCBs in a future print run of a game. So the lot check process (Nintendo's counterpart to Sony TRC) draws a fence around the manual-defined behaviors as "undefined behavior" and threatens to reject any submitted program that relies on unspecified or undefined behavior.


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PostPosted: Sun Aug 19, 2018 1:02 am 
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poorstudenthobbyist wrote:
Well, that's all fine - I assumed the SNES didn't care, since the boards I have in front of me map starting at 0x20 - I just wasn't sure why this wouldn't be explained or mentioned in the official manual. I found some inaccurate information on a few sites that came up on page 1 Google searches, so I was trying to rely on the manual rather than (possibly inaccurate) findings on the internet.

There are separate sections in the manual that described individual PCB wirings/layouts, per-mode (i.e. not the screenshot you provided). Please see 1-2-24 to 1-2-38.

If the cartridges in question use their own unique wiring/layout that's not described, it wouldn't come as a surprise; it could be something unique that was done after-the-fact or just was never officially documented. It happens.


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