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PostPosted: Wed Sep 26, 2018 5:49 am 
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Greetings.

Lately have been rounding over my head some questions about the snes and its potentially spectrum of possibilities in terms of hardware.

The option of an different cpu than the 65816 is discarded cause it always been plannified an custom WDC, but the question is, What kind of solutions would have been possible in that dates according to its costs?... How many 65816 were abailable in 1989, and maybe 1990?... prices?...

And what about the WRAM?, What was its cost?, How many kind of memories could be implemented to improve its 2,68Mhz?.

An spc700 with 2Mhz?... and the mother of all laments, How is possible that nintendo declined to include an 5$ SFX chip in all the snes?.


i'd really like to know what were the prices of all the available components in that years to figure out how could have been an realistic different configuration, but google doesn't helps too much...


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PostPosted: Wed Sep 26, 2018 6:28 am 
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I found this newspaper article from 1984 and it says the 68000 was only $15. If that's the case how cheap was it in 1990, and how much money did Nintendo really save by using a custom 65816?

https://www.nytimes.com/1984/06/29/busi ... -chip.html


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PostPosted: Wed Sep 26, 2018 6:41 am 
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They went with 65816 instead of 68000 because they wanted to make it easy to port NES games to SNES (my guess).

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nesdoug.com -- blog/tutorial on programming for the NES


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PostPosted: Wed Sep 26, 2018 6:42 am 
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A custom memory controller was needed anyway for the DMA functionality. Consoles from 1996 and later tend to integrate the memory controller onto the GPU (cf. N64 RSP and Xbox 360 Xenos), but the S-PPU was already two chips. Also remember that for perhaps the first few months, Nintendo pursued compatibility with Famicom cassettes, and even after Nintendo discarded that, a 65816 was still familiar to experienced 6502 programmers. So it was one of these:

  1. Use the 68000, add yet another chip for the memory controller, and discard previous-generation programmers' ISA experience.
  2. License the 65816 core from WDC, put it on the same die as the memory controller, and leverage previous-generation programmers' ISA experience.

The Genesis got away with A because its VDP was much simpler: no affine backgrounds, fewer layers, very limited color math (shadow/highlight being a 50/50 mix with black or white), and smaller palette. This let it integrate some of the DMA functionality into the VDP; its memory controller mostly performs bus arbitration among the 68000 CPU, VDP, and Z80 CPU.


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PostPosted: Wed Sep 26, 2018 7:08 am 
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psycopathicteen wrote:
I found this newspaper article from 1984 and it says the 68000 was only $15. If that's the case how cheap was it in 1990, and how much money did Nintendo really save by using a custom 65816?

https://www.nytimes.com/1984/06/29/busi ... -chip.html


Not only in matters of money, i think the election of an 65816 was better having in mind the kind of software that the console was going to have.

It was too early to need math complex computation in these hardwares, cause all of its needings passed through by the capabilities of its video systems, so the better accesses and interrupts of the 65816 are better when you need to command many things in short spaces of time, for that games.


P.D: I've been searching for the link of the super fx costs, but i can't find nothing (and i'm sure i've read that was not more than 5$).


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PostPosted: Wed Sep 26, 2018 8:33 am 
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There is the small matter that the SFX didn't exist when the SNES was made. The fact is was made in the UK by Argonaut.

Does the SNES make use of the phi1 half of the clock cycle to bus share?


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PostPosted: Wed Sep 26, 2018 8:55 am 
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Señor Ventura wrote:
psycopathicteen wrote:
I found this newspaper article from 1984 and it says the 68000 was only $15. If that's the case how cheap was it in 1990, and how much money did Nintendo really save by using a custom 65816?

https://www.nytimes.com/1984/06/29/busi ... -chip.html


Not only in matters of money, i think the election of an 65816 was better having in mind the kind of software that the console was going to have.

It was too early to need math complex computation in these hardwares, cause all of its needings passed through by the capabilities of its video systems, so the better accesses and interrupts of the 65816 are better when you need to command many things in short spaces of time, for that games.


P.D: I've been searching for the link of the super fx costs, but i can't find nothing (and i'm sure i've read that was not more than 5$).


It's too bad 98% of the SNES library was programmed by robots who can't figure out how to juggle 3 registers.


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PostPosted: Wed Sep 26, 2018 9:34 am 
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Oziphantom wrote:
There is the small matter that the SFX didn't exist when the SNES was made. The fact is was made in the UK by Argonaut.


I've read that it was near to be real simultaneously during the fabricantion of the american snes.

Oziphantom wrote:
Does the SNES make use of the phi1 half of the clock cycle to bus share?


Here you have some info about this question:
http://forum.6502.org/viewtopic.php?f=4&t=4350

psycopathicteen wrote:
It's too bad 98% of the SNES library was programmed by robots who can't figure out how to juggle 3 registers.


I meaned that the software of the 16 bits consoles doesn't require managing code for dooms, 3D games, complex physics, the use of multiplication intensively (motorola 6000 has it, but is not recommended precisely for lack of raw power).


Let me do you a couple of questions...
-Hard drivi'n in a motorola 68000 or in a 65816, both at the same speed.
-Final fight in a 68000@3.58mhz or in a 65816@3.58mhz.

In my opinion, 65816 is better for the kind of games of the second option, and the 68000 is better for the one's. All in terms of real perfomance, not friendliness coding.


But i tried to speak about another theme.


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PostPosted: Wed Sep 26, 2018 9:50 am 
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Oziphantom wrote:
Does the SNES make use of the phi1 half of the clock cycle to bus share?
Nothing like the C64.

In the stock 65816, φ1 is used to drive the bank address on the data bus, but that's not visible in the SNES. I'm not clear how/if the bank address is multiplexed and then demultiplexed inside the CPU die, or if it just stays demultiplexed all the way from the core.


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PostPosted: Wed Sep 26, 2018 10:16 am 
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(from the other thread)

Señor Ventura wrote:
creaothceann wrote:
Wasn't the restriction to 2.68MHz because of the slow ROM chips of the day + the 8-bit data bus?

Yes, presumably the WRAM forces the DMA to adapt its frequency to 2,68mhz, i don't know if the DMA actually works at 3.58mhz of stock.

WRAM can operate at 3.58MHz (iirc byuu tested it?), but perhaps not reliably. DMA is always 2.68MHz.

If the SA1 has a 16-bit data bus then how can it read single bytes? All the addressing modes would have to be changed...


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PostPosted: Wed Sep 26, 2018 10:24 am 
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WRAM via its interface on the B bus is always at 3.6MHz, because of where it's addressed.

As far as I remember, no-one has seen any SNES parts work reliably at 2.7MHz but fail at 3.6MHz.


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PostPosted: Wed Sep 26, 2018 11:35 pm 
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Ok so if the SNES doesn't use the Phi1 cycle for anything or access internally.. then why don't the expansion chips use that half of the bus instead of blocking the CPU when they want to access the RAM/ROM sigh..

Señor Ventura wrote:
Oziphantom wrote:
There is the small matter that the SFX didn't exist when the SNES was made. The fact is was made in the UK by Argonaut.


I've read that it was near to be real simultaneously during the fabricantion of the american snes.

So the US launch was Aug 91.
While the Japanese launch was Nov 90.
Given they needed to get hardware "locked" for devkits, documentation(ahahhaha) and so teams could finish their Launch titles at least 3 months before ROM fab, which took a month or so. So that puts final hardware 4 months min before Japanese launch. They would have needed working prototypes of the hardware at least 6 months before final devkits.They couldn't even just run a theoretical emulator on a more powerful PC because those didn't exist. I don't know how slow the Japanese MRA would have been back in the days of paper to clear and approve a machine. Plus time to setup production runs, board manufacture. However they also had to design, make and fab test their own custom chips, given I don't think Nintendo had in house Fab, that adds more delay. They would have also needed to get yield levels up to make sure a product was viable. Basically I feel that the final SNES specs or 90% of them of which the CPU and it timing characteristics would have been a massive part of the design would have needed to be worked out at least 1.5 years before launch. The SNES would have been designed before even Argonaut knew there was a SNES to make the SUPER FX for. While their is the story that the SNES was to be 68K but the MD forced their timelines to accelerate, and a switch to the 65816, so maybe they were having trouble with the 68K timings and the simpler 65816 meant they cold finalize the design faster.. however at that point all code would have had to be rewritten, so that must have been early enough in the dev process. the Mega Drive was announced in June '88 and launched in Oct '88 however development started in '86.

But then to split their market and make the US SNES have a FX chip while the SFC doesn't, doesn't make sense, as most of the SNES dev was done in Japan by Japanese developers, whom wouldn't make use of the FX chip because they would want to sell and target the SFC. And then 3D wasn't a big thing, sure Star Fox went on be a massive hit, but sitting at '90 you wouldn't have called it. The Quirky Gaigen game might have been a flop, and 3D a waste of money. I mean Sega didn't even think 3D was going to be a big thing with the Saturn.. Japan was anti and still kind of is 3D.


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PostPosted: Thu Sep 27, 2018 12:11 am 
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Oziphantom wrote:
Ok so if the SNES doesn't use the Phi1 cycle for anything or access internally.. then why don't the expansion chips use that half of the bus instead of blocking the CPU when they want to access the RAM/ROM sigh...

Afaik the Phi1 phase (it's one half of a clock cycle) is used to set up the address bus, plus the data bus if it's a write access.

Oziphantom wrote:
Señor Ventura wrote:
Oziphantom wrote:
There is the small matter that the SFX didn't exist when the SNES was made. The fact is was made in the UK by Argonaut.

I've read that it was near to be real simultaneously during the fabricantion of the american snes.

So the US launch was Aug 91.
While the Japanese launch was Nov 90.
Given they needed to get hardware "locked" for devkits, documentation(ahahhaha) and so teams could finish their Launch titles at least 3 months before ROM fab, which took a month or so. So that puts final hardware 4 months min before Japanese launch. They would have needed working prototypes of the hardware at least 6 months before final devkits.They couldn't even just run a theoretical emulator on a more powerful PC because those didn't exist. I don't know how slow the Japanese MRA would have been back in the days of paper to clear and approve a machine. Plus time to setup production runs, board manufacture. However they also had to design, make and fab test their own custom chips, given I don't think Nintendo had in house Fab, that adds more delay. They would have also needed to get yield levels up to make sure a product was viable. Basically I feel that the final SNES specs or 90% of them of which the CPU and it timing characteristics would have been a massive part of the design would have needed to be worked out at least 1.5 years before launch. The SNES would have been designed before even Argonaut knew there was a SNES to make the SUPER FX for. While their is the story that the SNES was to be 68K but the MD forced their timelines to accelerate, and a switch to the 65816, so maybe they were having trouble with the 68K timings and the simpler 65816 meant they cold finalize the design faster.. however at that point all code would have had to be rewritten, so that must have been early enough in the dev process. the Mega Drive was announced in June '88 and launched in Oct '88 however development started in '86.

But then to split their market and make the US SNES have a FX chip while the SFC doesn't, doesn't make sense, as most of the SNES dev was done in Japan by Japanese developers, whom wouldn't make use of the FX chip because they would want to sell and target the SFC. And then 3D wasn't a big thing, sure Star Fox went on be a massive hit, but sitting at '90 you wouldn't have called it. The Quirky Gaigen game might have been a flop, and 3D a waste of money. I mean Sega didn't even think 3D was going to be a big thing with the Saturn.. Japan was anti and still kind of is 3D.

This page has some interesting info/links.


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PostPosted: Thu Sep 27, 2018 12:42 am 
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creaothceann wrote:
Oziphantom wrote:
Ok so if the SNES doesn't use the Phi1 cycle for anything or access internally.. then why don't the expansion chips use that half of the bus instead of blocking the CPU when they want to access the RAM/ROM sigh...

Afaik the Phi1 phase (it's one half of a clock cycle) is used to set up the address bus, plus the data bus if it's a write access.

You pull the 65816 Data bus off the Main bus, and then connect it to your "bank" latch. Thus leaving the bus open. But the address propagation etc takes time so you can you can set up the Phi1 address while the Phi2 is falling and the main device is reading/writing the data bus.
Code:
    |set Address
    |  | read data
    ___
___/   \___   1
 ___     ___
    \___/   \ 2
    | read data
         | set address
65816 has the complication that you need to have external logic to tristate the 65816's bus during the Phi1 phase, and connect it to your latches and stop it from appearing on the "bus" but that is not hard to do ;)


creaothceann wrote:
This page has some interesting info/links.

So the CPU was locked by Aug '88 and the hardware was mostly developed 87~88 with revisions to the layouts, small features etc tweaked up until 90


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PostPosted: Thu Sep 27, 2018 3:25 pm 
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Oziphantom wrote:
They would have needed working prototypes of the hardware at least 6 months before final devkits.


Here is a link from nintendolife (i didn't read yet).

The North American SNES Almost Shipped With Super FX Built-In
http://www.nintendolife.com/news/2013/0 ... x_built_in


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