BA6 -> CS2 on 6264
/BA6 -> /CS on ROM
So cart RAM will reside at $40:8000 and mirrors.
I see this will have bus conflicts with internal wram, but how about at $c0:8000?
Does the address lines need a latch?
Sorry if this sounds stupid.
Using high bank lines as address decoder?
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Using high bank lines as address decoder?
Let's say a 512k lorom rom game, could the high bank lines be used as an address decoder for cart RAM?
BA6 -> CS2 on 6264
/BA6 -> /CS on ROM
So cart RAM will reside at $40:8000 and mirrors.
I see this will have bus conflicts with internal wram, but how about at $c0:8000?
Does the address lines need a latch?
Sorry if this sounds stupid.
BA6 -> CS2 on 6264
/BA6 -> /CS on ROM
So cart RAM will reside at $40:8000 and mirrors.
I see this will have bus conflicts with internal wram, but how about at $c0:8000?
Does the address lines need a latch?
Sorry if this sounds stupid.
...
Re: Using high bank lines as address decoder?
Unfortunately, on the SNES, there's no single address line that can be used as a way to map a device. You have to use /ROMSEL or else add external logic.
For your example of using BA6=A22, you can't only use the copy of RAM that you've mapped in the region where A23 is high: it'll still conflict with SNES-internal RAM because A23 isn't being used at all.
For your example of using BA6=A22, you can't only use the copy of RAM that you've mapped in the region where A23 is high: it'll still conflict with SNES-internal RAM because A23 isn't being used at all.
Re: Using high bank lines as address decoder?
Really not recommended, but I think this should work...
ROM./CS=/ROMSEL
SRAM./CS=A15 and SRAM.CS2=A23
The SRAM would be accessible at 80h-BFh:6000h-7FFFh, but that location isn't compatible with SRAM mapping in standard LoROM carts & standard LoROM emulation. And it would cause bus conflicts when accessing anything else in bank 80h-FFh. And you couldn't use SRAM./CS or SRAM.CS2 for battery logic with that wiring.
ROM./CS=/ROMSEL
SRAM./CS=A15 and SRAM.CS2=A23
The SRAM would be accessible at 80h-BFh:6000h-7FFFh, but that location isn't compatible with SRAM mapping in standard LoROM carts & standard LoROM emulation. And it would cause bus conflicts when accessing anything else in bank 80h-FFh. And you couldn't use SRAM./CS or SRAM.CS2 for battery logic with that wiring.
Re: Using high bank lines as address decoder?
Sorry, can you be more specific. As I understand, internal RAM is at banks $7e and $7f, but not at banks
$fe and $ff. So how does this conflict?
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Re: Using high bank lines as address decoder?
That was referring to your example. You were using A22=1 (BA6) to enable SRAM, which does confilct with WRAM in bank 7Eh-7Fh. The SRAM mapping may work in other banks, but the WRAM stops working with that example.
Oh, and latching: The whole address bus is supposed to stay constant throughout the whole memory access, so it would be pointless the latch (memorize) the address lines.
Oh, and latching: The whole address bus is supposed to stay constant throughout the whole memory access, so it would be pointless the latch (memorize) the address lines.
Re: Using high bank lines as address decoder?
What nocash said.
To wit, software can prevent a bus conflict if it there's another place it can access the same memory. But by using A22 (BA6), there's no way to access only SNES-internal RAM (any place where A23 downto A17 = 7'b0111111 ) without also accessing your hypothetical decoded RAM (any place where A22 = 1'b1 ).
To wit, software can prevent a bus conflict if it there's another place it can access the same memory. But by using A22 (BA6), there's no way to access only SNES-internal RAM (any place where A23 downto A17 = 7'b0111111 ) without also accessing your hypothetical decoded RAM (any place where A22 = 1'b1 ).