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PostPosted: Wed Jul 08, 2009 1:50 am 
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ikari_01 wrote:
Does the SuperFX do this, too?


No it doesn't. It has to be switched manually by the S-CPU. I was incredibly tired when reading that part on Monday...

Edit: ARGH, the SA-1 does not pause the S-CPU at all! Looks like I misread more than I thought. My previous post can be largely ignored.

I still wonder what these chips do with the REFRESH pin, though.


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PostPosted: Wed Jul 08, 2009 11:59 am 
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ikari_01 wrote:
I still wonder what these chips do with the REFRESH pin, though.
Nothing? I don't believe any carts contain PSRAM.


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PostPosted: Wed Jul 08, 2009 3:42 pm 
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Sorry, I was just being lazy and using the SRAM chip timings from my copier.
SlowROM = 8 clocks at 21.477MHz, FastROM = 6 clocks at 21.477MHz.
Every time I divide by such large differences I get 1.NNe results, bleh.

Quote:
Watching a bit of Star Ocean I saw that after some seconds the CPU clock (not the 21MHz system clock) is regularly held low for a short time once per line, in addition to the refresh pause.


Do you have the ability to run oscilliscopes on these lines? If so, could I ask you a huge favor? Could you please check the frequencies of the S-CPU and S-SMP clocks? We know the S-SMP typically runs a little faster than spec (~24606720hz instead of 24576000hz stock.) I'd like to know if the S-CPU is similarly off by any significant margin. Would need to know your region too, eg NTSC or PAL.

As for Star Ocean, I'd have to know what the CPU pin did exactly to have any idea why it's doing it. I don't think anyone fully understands how that chip works. Probably a lot of onboard logic to "detect" DMA starts (eg suddenly the read address changes significantly after it sees a $420b write on the bus.)

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What I'm trying to figure out (to decide which SNES pins I actually have to connect to the FPGA) is how the SA-1 manages to halt/suspend the S-CPU during concurrent access of the same memory area (e.g. both SA-1 and S-CPU access the ROM).


Not possible. What happens is the SA-1 stalls its own CPU whenever the S-CPU tries to access the same logical device (I-RAM, BW-RAM or ROM.) It's actually quite complex the way it interleaves memory accesses. Very difficult to emulate.

The SuperFX doesn't have this problem since they cannot share ROM / RAM at the same time. There's a bit setting that tells you which chip can access it. If the GSU/SFX has control, the S-CPU gets back pre-determined "dummy" results:
Code:
uint8 SuperFXCPUROM::read(unsigned addr) {
  if(superfx.regs.sfr.g && superfx.regs.scmr.ron) {
    static const uint8_t data[16] = {
      0x00, 0x01, 0x00, 0x01, 0x04, 0x01, 0x00, 0x01,
      0x00, 0x01, 0x08, 0x01, 0x00, 0x01, 0x0c, 0x01,
    };
    return data[addr & 15];
  }
  return memory::cartrom.read(addr);
}

... used to fake interrupt vector fetching to point it at WRAM locations.

If the S-CPU has control and the GSU tries to access ROM / RAM, it will lock the chip until the S-CPU gives control back. Much nicer to emulate.

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Nothing? I don't believe any carts contain PSRAM.


The BS-X Satellaview base cart has PSRAM. I don't know if any carts make use of the /REFRESH signal or not, though. I'm more of a software guy ...


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PostPosted: Wed Jul 08, 2009 4:39 pm 
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Location: NE Indiana, USA (NTSC)
byuu wrote:
could I ask you a huge favor? Could you please check the frequencies of the S-CPU and S-SMP clocks? We know the S-SMP typically runs a little faster than spec (~24606720hz instead of 24576000hz stock.) I'd like to know if the S-CPU is similarly off by any significant margin.

If it is, then the colors would probably be incorrect, as the PPU generates the color subcarrier at Fsc = Fmaster/6, and TVs depend on the Fsc being pretty damn close to spec. There are 640*7/24 = 186 cycles of the color subcarrier on a scanline, which means that if Fsc is off by 2700 parts per million, the colors will be 180 degrees out of phase on the right side. Google ntsc color subcarrier tolerance brought me to this page, which appears to claim that the tolerance on Fsc is 10 Hz, or about 3 parts per million.


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PostPosted: Thu Jul 09, 2009 11:38 am 
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Regarding frequencies and what not, this is what I have:

CPU clock freq, NTSC, non-interlaced mode = 21.47727MHz
CPU clock freq, NTSC, interlaced mode = 21.47727MHz

CPU clock freq, PAL, non-interlaced mode = 21.28137MHz
CPU clock freq, PAL, interlaced mode = 21.28137MHz

Number of clock cycles per pixel: MODEs 5,6 == 2 cycles, MODEs 1-4,7 == 4 cycles

Number of clock cycles per horizonal line: 1364 (341*4)

NTSC non-interlaced scanline count, first field: 262
NTSC interlaced scanline count, first field: 262
PAL non-interlaced scanline count, first field: 312
PAL interlaced scanline count, first field: 312

NTSC non-interlaced scanline count, second field: 262
NTSC interlaced scanline count, second field: 263
PAL non-interlaced scanline count, second field: 312
PAL interlaced scanline count, second field: 313

One CPU machine cycle == 6 clock cycles (FastROM), 8 clock cycles (MediumROM (?!)), 12 clock cycles (SlowROM)

There's no difference in sound timing (re: S-SMP) between any of the above models/units/revisions.

I don't have any clock frequency details for the S-SMP, sadly.


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PostPosted: Fri Jul 10, 2009 4:10 am 
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byuu wrote:
Could you please check the frequencies of the S-CPU and S-SMP clocks? We know the S-SMP typically runs a little faster than spec (~24606720hz instead of 24576000hz stock.) I'd like to know if the S-CPU is similarly off by any significant margin.


I'd love to help, but my equipment (Philips PM 3260) doesn't provide such precise readouts, let alone frequency measurements. All I could say is "yup, definitely around 21MHz!".

Regarding color subcarrier frequency, I think modern TVs might be more tolerant. I have a PAL 1chip SNES which cannot simply be switch-modded to 50/60Hz, you also have to provide an additional quartz crystal. Unable to find a 21.477MHz crystal I ripped a 21.44MHz off a Yoshi's Island cartridge (hey, the GSU-2 doesn't seem to mind running @25MHz). I still get a color picture in 60Hz mode (which is then effectively PAL 3.58 :shock:).


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