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PostPosted: Fri Dec 14, 2012 12:12 pm 
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qwertymodo wrote:
Woops, you're right. You could do it with 1 of these and just tie the 2 output buses together, then use a single transistor NOT gate as a 1-of-2 decoder to drive the /OE's. Considering the alternatives, MAX4551's are ~$4 each and you'd need 2. A cheap PIC is going to be a couple bucks, and then you have to program it. An FPGA is complete overkill. The 74CBT16210 is ~$1.


It would work with this part, but wiring would be a real mess. I only pay 1 buck for a 4551 here. If a PIC for $3 can do the job, I think that's a good solution.


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PostPosted: Fri Dec 14, 2012 1:52 pm 
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Routing wouldn't be too bad if you mirrored the two banks (connected 1B1<->2B10, 1B2<->2B9, 1B3<->2B8, etc.).


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PostPosted: Mon Feb 06, 2017 1:35 am 
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Sorry to dig up old thread, but not finding much information. Was you able to get this to work? I want to make me some carts, but I need some lorom games, but I have a ton of hirom here. Just need a way to convert them over so that lorom games will work on the hirom boards?


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PostPosted: Mon Feb 06, 2017 7:12 am 
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The easiest way, if you are willing to waste memory and the game lacks battery save, is to double each 32768 bytes of the ROM.


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PostPosted: Tue Feb 07, 2017 1:08 am 
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Yeah I need a battery =( hehe


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PostPosted: Tue Feb 07, 2017 9:30 am 
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The rewiring to move the battery save from (say) $708000 to $306000 is a bit more extensive than the minimum needed to get a saveless game working.


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PostPosted: Sat Sep 29, 2018 12:14 pm 
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Sorry for posting so late.

I lately was wondering about convert a LO-rom game into a HI-rom game, letting the snes functioning to 3,58mhz... theoretically it could eliminate some slowdowns, right?.


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PostPosted: Sat Sep 29, 2018 1:09 pm 
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"HiROM" (officially mode $21) and "LoROM" (officially mode $20) have nothing to do with "FastROM" and "SlowROM".

There is a single control inside the SNES
that specifies whether memory accessed in banks $80-$BF, $8000-$FFFF, and banks $C0-$FF
is accessed at 3.6MHz or at 2.7MHz

You'll note that this memory region contains both the "HiROM" addresses (banks $C0-$FF) and the mirror of the "LoROM" addresses (banks $80-$BF)

The game itself is responsible for selecting what address and what speed it runs at. It has nothing to do with how the cartridge is wired.


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PostPosted: Sat Sep 29, 2018 2:59 pm 
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In my opinion, the path of least resistance is to use fast LoROM (mode $30), patch the bank bit of all jumps in banks $00-$7D to instead point at the mirror $80-$FD, and tell the memory controller that you're using fast ROM (set $420D to 1). For completeness, you could also patch long addresses in the ROM, but that probably won't have quite as much bang for buck as patching all jumps.


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PostPosted: Sat Sep 29, 2018 3:39 pm 
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lidnariq wrote:
"HiROM" (officially mode $21) and "LoROM" (officially mode $20) have nothing to do with "FastROM" and "SlowROM".

There is a single control inside the SNES
that specifies whether memory accessed in banks $80-$BF, $8000-$FFFF, and banks $C0-$FF
is accessed at 3.6MHz or at 2.7MHz

You'll note that this memory region contains both the "HiROM" addresses (banks $C0-$FF) and the mirror of the "LoROM" addresses (banks $80-$BF)

The game itself is responsible for selecting what address and what speed it runs at. It has nothing to do with how the cartridge is wired.


Yes, is true.

I'm reading that inside of the header (64 Bytes), there is a Byte called "ROM layout" that determines what kind of memory ROM uses the game (LoROM, HiROM, ExLoROM, ExHiROM, fastROM, or slowROM).

But it couldn't be so easy, if not nowadays all the slowROM games would be patched already.

tepples wrote:
In my opinion, the path of least resistance is to use fast LoROM (mode $30), patch the bank bit of all jumps in banks $00-$7D to instead point at the mirror $80-$FD, and tell the memory controller that you're using fast ROM (set $420D to 1). For completeness, you could also patch long addresses in the ROM, but that probably won't have quite as much bang for buck as patching all jumps.


So, it is laborious, but possible. Well, it is a consolation.


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PostPosted: Sun Sep 30, 2018 5:18 am 
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Señor Ventura wrote:
I'm reading that inside of the header (64 Bytes), there is a Byte called "ROM layout" that determines what kind of memory ROM uses the game (LoROM, HiROM, ExLoROM, ExHiROM, fastROM, or slowROM).

The SNES doesn't care about the header except for the interrupt pointers. The rest could be completely blank (and probably is in some ROMs).


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PostPosted: Sun Sep 30, 2018 7:12 am 
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The Control Deck doesn't care about the header, but Nintendo certification did so that they could figure out what kind of cartridge to manufacture.


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PostPosted: Sun Sep 30, 2018 8:26 am 
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creaothceann wrote:
Señor Ventura wrote:
I'm reading that inside of the header (64 Bytes), there is a Byte called "ROM layout" that determines what kind of memory ROM uses the game (LoROM, HiROM, ExLoROM, ExHiROM, fastROM, or slowROM).

The SNES doesn't care about the header except for the interrupt pointers. The rest could be completely blank (and probably is in some ROMs).


So, finally is not only information, is just what i expected xD

Anyway, it means that all the slow roms could potentially benefits of an increase of performance, only by re-addressing the memory directions.

It sounds like a really extensive and hard task, checking all the code for possible references, but a task that only have to be done one time.


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