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PostPosted: Sun Feb 15, 2015 12:22 am 
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When I said I prefer the old way, I think I mean that I prefer the way on the page I linked: http://wiki.nesdev.com/w/index.php/VRC6_audio

The current PPU registers page is really hard to see which bits are which, but the similar style used on many mapper pages labels the bits with letters instead of just drawing lines straight out from bit numbers. It makes the structure of the register MUCH clearer.

So... I'd rather see that than tables. The monospaced font makes a nice regular grid of things, easy to read, not a lot of extraneous lines like you have on a table. If the PPU registers were diagrammed like that, I would much prefer that to tables.

What's currently there is terrible, you have to look hard to see what is in individual bits. It's not very at-a-glance readable.


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PostPosted: Sun Feb 15, 2015 2:17 am 
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I prefer any style that has a visual diagram, so both the old and new methods are fine by me.

With that being said, the new method is slightly clearer to me, due to the functions being visually defined as bitmasks to the byte, and has the ability to be rearranged without lines crossing or anything.
It doesn't need to be a table, it can be preformatted text:
Code:
7  bit  0
---- ----
NRZP SVBB
---- --BB  Base nametable address
           (0 = $2000; 1 = $2400; 2 = $2800; 3 = $2C00)
---- -V--  VRAM address increment per CPU read/write of PPUDATA
           (0: add 1, going across; 1: add 32, going down)
---- S---  Sprite pattern table address for 8x8 sprites
           (0: $0000; 1: $1000; ignored in 8x16 mode)
---P ----  Background pattern table address (0: $0000; 1: $1000)
--Z- ----  Sprite size (0: 8x8; 1: 8x16)
-R-- ----  PPU master/slave select
           (0: read backdrop from EXT pins; 1: output color on EXT pins)
N--- ----  Generate an NMI at the start of the
           vertical blanking interval (0: off; 1: on)

This would be a marriage of both styles.


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PostPosted: Mon Feb 16, 2015 2:09 am 
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Just saying I like both (fireburg's and table-like) alternatives equally well, so my vote doesn't go to any of these. I still like fireburg's style for it's compactness.

I however don't like particularly the Microchip style, because it is overcomplicated for no particularly more understandable result (why give cryptic names such as 'EXTOUTEN' for every single bit ? I was already opposing giving names to PPU registers, but I'd oppose even more naming all the bits !


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PostPosted: Mon Feb 16, 2015 2:03 pm 
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Yeah, in looking at PSG chip documentation, microchip style is used a lot for describing registers, and although it makes sense, it's not the prettiest to look at, but it is condensed and allows a summary of all registers to fit on a single page. I prefer seeing bitmasks when each register is explained in detail though.


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PostPosted: Mon Feb 16, 2015 4:50 pm 
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I stuck some letters on the diagrams that were there, I figure that's an improvement on what was already there, whether or not you want to make more drastic changes. It's only 3 registers we're talking about, anyway, not really much work to redo.


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PostPosted: Mon Feb 16, 2015 5:12 pm 
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Bregalad wrote:
Just saying I like both (fireburg's and table-like) alternatives equally well, so my vote doesn't go to any of these. I still like fireburg's style for its compactness.

I however don't like particularly the Microchip style
Roughly what I think.


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PostPosted: Mon Mar 16, 2015 2:10 am 
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Thread has been locked. The overwhelming majority of users preferred the older non-table rendition, and thus it shall be kept. Thanks everyone for giving feedback!


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