The current PPU registers page is really hard to see which bits are which, but the similar style used on many mapper pages labels the bits with letters instead of just drawing lines straight out from bit numbers. It makes the structure of the register MUCH clearer.
So... I'd rather see that than tables. The monospaced font makes a nice regular grid of things, easy to read, not a lot of extraneous lines like you have on a table. If the PPU registers were diagrammed like that, I would much prefer that to tables.
What's currently there is terrible, you have to look hard to see what is in individual bits. It's not very at-a-glance readable.
With that being said, the new method is slightly clearer to me, due to the functions being visually defined as bitmasks to the byte, and has the ability to be rearranged without lines crossing or anything.
It doesn't need to be a table, it can be preformatted text:
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7 bit 0 ---- ---- NRZP SVBB ---- --BB Base nametable address (0 = $2000; 1 = $2400; 2 = $2800; 3 = $2C00) ---- -V-- VRAM address increment per CPU read/write of PPUDATA (0: add 1, going across; 1: add 32, going down) ---- S--- Sprite pattern table address for 8x8 sprites (0: $0000; 1: $1000; ignored in 8x16 mode) ---P ---- Background pattern table address (0: $0000; 1: $1000) --Z- ---- Sprite size (0: 8x8; 1: 8x16) -R-- ---- PPU master/slave select (0: read backdrop from EXT pins; 1: output color on EXT pins) N--- ---- Generate an NMI at the start of the vertical blanking interval (0: off; 1: on)
I however don't like particularly the Microchip style, because it is overcomplicated for no particularly more understandable result (why give cryptic names such as 'EXTOUTEN' for every single bit ? I was already opposing giving names to PPU registers, but I'd oppose even more naming all the bits !
Roughly what I think.Bregalad wrote:Just saying I like both (fireburg's and table-like) alternatives equally well, so my vote doesn't go to any of these. I still like fireburg's style for its compactness.
I however don't like particularly the Microchip style