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PostPosted: Fri May 20, 2016 3:56 pm 
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Just wanted to say thanks. Between the wiki and various posts I was able to convert Tecmo Super Bowl from MMC3 to MMC5.

The trickiest things were

1. Getting the CHR bank switching correct. I thought I needed to switch back and forth between 1KB and 2KB mode depending on if sprites or BG's were being updated but it didn't seem to work that way so I left it at 1KB mode and just adjusted the CHR banking routine. I also had to take into account which registers to write to since TSB switches between 8x8 and 8x16 sprites.

2. Obvoiusly the MMC5 IRQ system works differently than the MMC3. I had to adjust the routines to take into accounr the fact that MMC5 is always counting up and it wants an absolute scanline and not a relative one.

3. Not really tricky but I thought the SRAM protect registers referred to separate chips but both needed to be set for writing to write to SRAM. Maybe I just read the doc to quickly.

There actually wasn't too much code to change. Most of it was a ton of SRAM enable write, SRAM disable write changes.


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PostPosted: Fri May 20, 2016 4:34 pm 
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Out of curiosity, why? Space for further romhacking?


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PostPosted: Fri May 20, 2016 4:43 pm 
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Location: NE Indiana, USA (NTSC)
More detailed end zone logos might require CHR ROM bigger than 256K and/or ExGrafix.


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PostPosted: Fri May 20, 2016 5:00 pm 
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Location: Rio de Janeiro - Brazil
tepples wrote:
More detailed end zone logos might require CHR ROM bigger than 256K and/or ExGrafix.

Hacking a regular scrolling engine to make it work with ExGrafix doesn't sound like fun at all!


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PostPosted: Fri May 20, 2016 5:04 pm 
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Partly just to see if I could. It didn't take long( a few days).

The main benefits for TSB would be

1. Added SRAM (For additional stats, you could have an editable team). Currently the SRAM has just a few free bytes of space. (Most of it is used to save season stats, the rest is for temporary graphics saving) The general RAM is pretty well utilized as well.

2. Added PRG, CHR-space (this is somewhat minor compared to #1).


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PostPosted: Fri May 20, 2016 5:28 pm 
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Location: NE Indiana, USA (NTSC)
An easier way to get the added SRAM might be a mapper hack to FME-7 (#69). Unlike MMC5, FME-7 is available on repro boards, and it's been shown to support WRAM sizes up to 128K.


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PostPosted: Fri May 20, 2016 6:51 pm 
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Interesting...what emulators support it for testing?

Converting the IRQ values would be a bit trickier since its a CPU cycle counter but I'll give it a look at some point.


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PostPosted: Sat May 21, 2016 9:56 am 
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For hardware testing:
The FME-7 implementation in thefox's PowerMappers appears to support 32K of WRAM according to the test ROM.

For step debugging:
I don't know what to recommend. FCEUX r3218 does not; I've reported the missing feature.


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PostPosted: Sat May 21, 2016 7:26 pm 
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tepples wrote:
For hardware testing:
The FME-7 implementation in thefox's PowerMappers appears to support 32K of WRAM according to the test ROM.

Hmm, that sounds like a bug actually. It's not officially supported, since the mappers use the upper 24 KB of WRAM for menu code and variables. It should be fine however as long as the menu isn't opened (Start+Select).

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PostPosted: Sun May 22, 2016 6:12 am 
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The mapper pack I was using before PowerMappers (loopy's?) also supported 32K WRAM.


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