What is actually "baked into" the PPU?

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NewDietCoke248903
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What is actually "baked into" the PPU?

Post by NewDietCoke248903 » Sat Aug 20, 2016 6:00 pm

I was reading over the wikipedia page for the PPU here:

https://en.wikipedia.org/wiki/Picture_Processing_Unit

And saw these "Key features":
2 kB of external RAM to store tile layout and auxiliary color information for background graphics (commonly referred to as nametables)
256 bytes of internal DRAM for sprite attribute storage. This is measured in the amount of address space consumed; not every bit of every byte exists in the PPU.
32 bytes of internal SRAM for palette storage. As for sprite attribute storage, not all bits exist in the PPU.
I would assume that the external RAM is not actually on the chip (hence external). It does state that sprite DRAM is internal... Does that mean its physically located on the chip? Is this also true for the palettes?

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Quietust
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Re: What is actually "baked into" the PPU?

Post by Quietust » Sat Aug 20, 2016 6:22 pm

They're both entirely on the chip itself - if you look at the Visual 2C02 (or the layer images from which it was derived), you can see exactly where they are (sprite RAM is most of the upper-right corner of the chip, and the palette is a small area left center).

Technically, the Sprite DRAM is 2112 bits (8+8+5+8 bits for each of the 64 sprites, plus another 32 bytes for "secondary OAM" used during rendering), and the Palette SRAM is 168 bits (28x6 bits, since addresses 10/14/18/1C are mirrors of 00/04/08/0C).
Last edited by Quietust on Sun Aug 21, 2016 6:14 am, edited 2 times in total.
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tokumaru
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Re: What is actually "baked into" the PPU?

Post by tokumaru » Sat Aug 20, 2016 6:25 pm

NewDietCoke248903 wrote:I would assume that the external RAM is not actually on the chip (hence external). It does state that sprite DRAM is internal... Does that mean its physically located on the chip? Is this also true for the palettes?
Yes, OAM and palette RAM are inside the PPU chip, while an external (to the PPU, but still inside the NES) 2KB chip holds the name/attribute tables. In addition to that, the pattern tables are normally inside the cartridge, in either ROM or RAM form.

Configuration of the external memories is quite flexible though, so a cartridge can completely disable the 2KB VRAM chip inside the NES and use its own RAM chip for more name tables, or do the exact opposite and not offer any video memory, using the stock 2KB for both name tables and patterns, at the cost of severely reducing the amount of unique tiles available to the game. No commercial games ever used that last setup, but it is possible.

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HVC-Man
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Re: What is actually "baked into" the PPU?

Post by HVC-Man » Sun Aug 21, 2016 11:47 pm

tokumaru wrote:
NewDietCoke248903 wrote:or do the exact opposite and not offer any video memory, using the stock 2KB for both name tables and patterns, at the cost of severely reducing the amount of unique tiles available to the game. No commercial games ever used that last setup, but it is possible.
http://wiki.nesdev.com/w/index.php/INES_Mapper_218

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Re: What is actually "baked into" the PPU?

Post by tepples » Mon Aug 22, 2016 7:12 am

No commercial games ever used that last setup
Mapper 218
That depends on whether Magic Floor is "commercial". Anything sold on cartridge is "commercial" in the plain sense of the word. But a lot of sites cataloging releases restrict their scope to pre-1997 or full-time productions. BootlegGames, for example, has a scope approximating "commercial, unlicensed, and full-time" in order to accept Action 52 while rejecting Action 53.

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