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PostPosted: Wed Aug 23, 2017 1:45 am 
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Location: Sweden
snarf2888 wrote:
snarf2888 wrote:
I wanted people to opt in to optimizing and using zeropage addressing instead of trying to think for the programmer.
Programmers should be accountable for writing code optimized to their liking, even at such a low level.
Well if you do implement auto-zeropaging you'd want to offer options to manually override it. CA65 does it with the "a:" prefix:
Code:
  LDA a:$0001  ;force absolute addressing

Likewise it can force zeropage addressing with the "z:" prefix.

ASM6 offers no way of doing this AFAIK, being one of its flaws. Although a macro can get around it.


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PostPosted: Wed Aug 23, 2017 5:10 am 
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A more common way of forcing 16bits is the ~
so LDA ~$0000 <- forces 16 bits and not 8 bits. But I don't recommended it going forward.

using @b, @w tends to be the new way so
LDA@b $0000 <- ZP
LDA@w $0000 <- 16bit

This is basically a 68K like syntax, and extends better when you get to 65816 where you add
LDA@l $0000 <- 24 bit
and then on immediates
LDA@w #0000 <- 16 bit immediate mode

Some assemblers use the ## form.
LDA ##0000 <- 16 bit
LDA #0000 <- 8 bit

with (),y
if you make your parse collapse everything in brackets but not remove them, say given
lda (3*4)+(2*5),Y
lda (12)+(10),Y
then you can detect if there is a ",y" and if there is, to a scope check to count the ( and ) and see if you end up with a pair that encapsulates from the opcode to the final comma ,y.
Which is count the ( and then count down the ) until you hit 0, if you hit 0 and the next 2 non whitespace chars is not ,y then its not (ZP),y
If it does have full encapsulation and ",y" , you collapse and resolve until only the outer pair remain.
say
lda ((3*4)+(2*5)),Y
lda ((12)+(10)),Y
lda (12+10),y
lda (24),y
Then you can do a check to see if the contents of the last brackets are <= 255 and then switch zp post indirect or abs. But in most cases I would say having the case above 255 is an error on the coders part and giving an error that it is over 255 is the more common use case. With a work around if they must do that way being
lda ((8*4)+(50*5))+0,y


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PostPosted: Thu Aug 24, 2017 7:34 pm 
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One of the features I like in NESASM is that it does not do auto zero paging.

_________________
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PostPosted: Thu Aug 24, 2017 9:12 pm 
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zzo38 wrote:
One of the features I like in NESASM is that it does not do auto zero paging.

I personally think you're crazy (I mean, why turn down an automatic 25% speed increase when accessing variables?), but I guess that the best solution would be to make this optimization optional.


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PostPosted: Thu Aug 24, 2017 10:54 pm 
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Actually, as a happy user of ASM6 myself, I may migrate back to using NESASM because of the non-auto ZP thing. I'm interested in PCE development, and may reuse some of the codes if possible, so not being able to automatically force ZP addressing is a necessity (as the ZP on PCE Hu6280 starts from $2000, not $0000, and also, stack is at $2100).

The best of both worlds, though, is to have a switch (either in command line or an assembler directive) to turn on or off whether ZP address modes are auto. I think there're some unofficial versions of NESASM that actually do this.

Or even better, someone takes the time to add Hu6280 (thus automatically also 65C02) support to ASM6, and add the switch mentioned above also.


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PostPosted: Fri Aug 25, 2017 2:04 am 
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If you switch to Tass64 ( I know know broken record ) you can use the .dpage option to make it automatically convert the right region for you. or if you want to do it manually you can do .dpage ? then use the ,d instruction mode as so LDA $02,d to force it into ZP mode.

Code:
; PCE test
.cpu "65c02"
.dpage $2000

lda $2002
sta 2
rts

.dpage ?
lda #$02,d
lda 2,d
lda 2
generates
Code:
; 64tass Turbo Assembler Macro V1.53.1515? listing file
; 64tass.exe -o D:\GitHub\test\pce.prg --no-caret-diag --dump-labels -l pce.tass -D BDD=0 -D CRT=0 -L pce.list --verbose-list --line-numbers -Wimmediate D:\GitHub\test\pce.asm
; Fri Aug 25 18:52:28 2017

;Line   ;Offset   ;Hex      ;Monitor   ;Source

:1   ;******  Processing input file: D:\GitHub\test\pce.asm

1                  ; PCE test
2                  .cpu "65c02"
3                  .dpage $2000

5   .0000   a5 02      lda $2002   lda $2002
6   .0002   8d 02 00   sta $0002   sta 2
7   .0005   60         rts         rts

9                  .dpage ?
10   .0006   a5 02      lda $02      lda #$02,d
11   .0008   a5 02      lda $02      lda 2,d
12   .000a   ad 02 00   lda $0002    lda 2


;******  End of listing

It sadly doesn't support the exclusive HuC6280 opcodes, I think the 6280 is a Rockwell 65c02 extensions so using R65c02 is probably a better match, and then you have to use Macros to get the others. I've asked about getting the extras in, but the author's code assumes a 3 letter opcode in a few places so its not a trivial thing to add sadly.


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PostPosted: Fri Aug 25, 2017 3:50 am 
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Yeah the Hu6280 is like 65C02 with the additional Rockwell instructions (BBS, BBR and SMB etc) but missing STP and WAI that WDC added. It's too bad because STP is an easy way to make breakpoints, and WAI is useful when waiting for interrupts.


Gilbert wrote:
Actually, as a happy user of ASM6 myself, I may migrate back to using NESASM because of the non-auto ZP thing. I'm interested in PCE development, and may reuse some of the codes if possible, so not being able to automatically force ZP addressing is a necessity (as the ZP on PCE Hu6280 starts from $2000, not $0000, and also, stack is at $2100).

The best of both worlds, though, is to have a switch (either in command line or an assembler directive) to turn on or off whether ZP address modes are auto. I think there're some unofficial versions of NESASM that actually do this.

Or even better, someone takes the time to add Hu6280 (thus automatically also 65C02) support to ASM6, and add the switch mentioned above also.

Yeah a 65816 fork for ASM6 already exists, so adding Hu6280 as well can't be that hard. Using the set direct page directive to set zero page to $2000 should do the trick. But I think ASM6 could also do with a way to force absolute addressing.

Currently the best assembler for PC Engine is Elmer's fork of PCEas (the PCEas exe is in the bin directory). It has done away with the 8 kB bank nonsense and recently got an option to pad the ROM to make 384 kB HuCards.


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