Was there an NES expansion chip like SA-1

Discuss technical or other issues relating to programming the Nintendo Entertainment System, Famicom, or compatible systems.

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Oziphantom
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Re: Was there an NES expansion chip like SA-1

Post by Oziphantom » Wed Jan 27, 2021 3:22 am

it would be interesting to see who it compares to a ZIP chip accelerator. 4Mhz 65C02 vs 5Mhz 8086 with buffer transfers etc. I would expect the ZIP chip to slaughter it. Then the 8Mhz or the Rocket Chip at 10mhz.

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Memblers
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Re: Was there an NES expansion chip like SA-1

Post by Memblers » Thu Jan 28, 2021 12:48 am

I have a project that I call Squeedo Jr. that sort of is like the SA-1. Sadly, it's been idle for a few years, far too long. Most likely when I do try to make another NES cart board, it's likely to be that one because it's the one I've been most excited about, by far. It's fairly ambitious and would be tricky pull it off (if it can even work the way I want), and that's mostly due to it being extremely cost-reduced. Should be cheaper than an MMC3 clone, otherwise what's the point? If cost doesn't matter, there's already better options available (or becoming available).

As far as digital parts, basically all that's on the board are level translators, a modest (by modern standards) FPGA, and a serial NOR flash. The only RAM would be inside the FPGA. This RAM would be triple-ported between the NES CPU, PPU, and an internal 6502 core. The 6502 could have some dedicated RAM as well, so it won't always be getting blocked by NES accesses. Instead of bankswitching, memory would be DMA'd (over a 4-bit wide serial interface) into FPGA RAM.

And yeah, like its namesake (if anyone remembers Squeedo), it also is audio-focused. But this time with the FPGA doing faster stuff like resampling/mixing, while the 6502 would likely handle the slower stuff such an instrument parameters, envelopes, etc.

This project is rife with technical challenges.. but it seems fun, and potentially would offer a lot of bang for the buck.. assuming it could even work. It's last status was I had the board layout about 80% complete, lots of timing issues planned out (there are multitudes of them), but very little of the actual Verilog written for it. So it's pretty far off, nice to dream about though.

I imagine there's not a ton of excitement around putting a faster 6502 in there. My own view is that the NES CPU is already fast enough to handle a decent NES game written in assembly. But I think a faster CPU would be nice when writing stuff in C, and it sounds even better now that a faster compiler such as vbcc6502 has appeared. I was aiming to get that 6502 running at about 7Mhz, but I think twice that speed might actually be feasible.. maybe.

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Gilbert
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Re: Was there an NES expansion chip like SA-1

Post by Gilbert » Thu Jan 28, 2021 2:29 am

Memblers wrote:
Thu Jan 28, 2021 12:48 am
a modest (by modern standards) FPGA
Wow. :shock: I am not sensitive to hardware advancement, and don't realise we're at such a point that even including this (and other nice things) would be cheaper than making a MMC3 clone.

Like you mentioned, cost is a major factor here (unless you're okay to buy Virtua Racing for the Mega Drive) and I think what you're designing was obviously not feasible in the original life time of the console, but could work really well nowadays (considering you claimed that it's cheaper than cloning the MMC3 is true, and I have no reason to doubt that, though I'm not really sure whether the time and resource spent in developing it would worth the effort).

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Re: Was there an NES expansion chip like SA-1

Post by calima » Thu Jan 28, 2021 11:07 am

So you want to put a 6502 on a cart so you can emulate NES on NES. (insert xzibit picture)

The MMC3 clones are CPLDs, and last I checked that's still cheaper than FPGA?

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Re: Was there an NES expansion chip like SA-1

Post by lidnariq » Thu Jan 28, 2021 12:20 pm

This past year, supply chain issues have blown up costs nonuniformly, negating the incremental cost between a suitable and large enough futureproofed CPLD (5M160 or XC9572, both $3.60/@10 via digikey) and the smallest FPGA with enough pins (iCE40LP1K, $3.70/@10)

The iCE40xx1K isn't big enough for any desirable softcore inside it, but it should be able to do a fair amount of complex PPU trickery

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Re: Was there an NES expansion chip like SA-1

Post by tepples » Thu Jan 28, 2021 4:22 pm

Wikipedia's article about iCE FPGA states that the iCE40 exposes programmable logic blocks (PLBs), or sets of 8 macrocells connected by a carry chain. But because iCE40 uses 4-bit instead of 6-bit LUTs like Xilinx, it can take more macrocells to compute intermediate outputs. How many does a 6502 or an 8080 take? How many does a Chipmunk (soft core based on a simplified 6502) take?

Do these iCE FPGAs boot instantly from nonvolatile configuration memory, or do resistors on the CPU data bus need to feed JMP $4C4C until the FPGA signals that it's ready?

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Re: Was there an NES expansion chip like SA-1

Post by lidnariq » Thu Jan 28, 2021 5:26 pm

The iCE40 Family Handbook says 13ms for the 1KLUT (and smaller) and 70ms for the 4KLUT (and bigger) devices from the internal OTP ... and 18ms with a PCB that supports maximum rate SPI communication regardless of size when booting from external SPI flash. That can't be right, the largest one takes 1Mbit of storage and the SPI clock is 40MHz, so that has to take 25ms. Maybe it's "time to transfer the image plus 18ms" ?

This implementation:
https://github.com/SpinalHDL/VexRiscvSo ... ontest2018
has a RISC-V core in the range of 1200-1800 LUT4

This implementation:
https://github.com/MorrisMA/MAM65C02-Processor-Core
has a 65C02 core around 700 LUT4 plus 250 bits of state

So I guess you could fit a real softcore in the cheapest iCE40 with enough I/O, but I'm not convinced it'd leave enough resources to do anything else of interest.

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aquasnake
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Re: Was there an NES expansion chip like SA-1

Post by aquasnake » Thu Jan 28, 2021 8:14 pm

Carry a MCU to realize communication transmission such as USB, WiFi, BT, etc. Or use the performance of this MCU to realize multiplication and division. Or use its IO port to realize in-system programming.

like these:
tpp_main.jpg
word-image-16.png
FPGA configuration of soft core MCU is not a commercial idea. FPGA has low frequency and high price. The system is complex and power consumption is high.

CPLD + MCU is my first choice

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Re: Was there an NES expansion chip like SA-1

Post by Memblers » Fri Jan 29, 2021 2:25 am

What would make the Squeedo Jr. design cheap is what it lacks, not needing a PRG ROM, CHR RAM, or WRAM chips. The board itself is NROM-sized. Well, technically there is a PRG-ROM (made from a level translator chip) but it's only 1 byte - $4C. So it sits in a JMP $4C4C loop during configuration. Which brings up another fun feature, the FPGA supports multiple configs and can be changed with a warm boot. So that means an NES game could switch between 2 to 4 entirely different configurations at will (I'm sure emulator authors are loving this already :roll:). The FPGA has 5K logic elements.

A big part of the challenge with this design is that the FPGA doesn't even have enough I/Os. So there's a deep rabbit hole to go down, between the level translators doubling as multiplexers, all the potential timing issues with different CPU/PPU revisions, and the signals from the 2A03 being really dirty (watching kevtris develop the hidef NES, I've seen things.. :shock: ). My plan to deal with that involves having the FPGA attempt to calibrate itself to suit each individual NES, every time it powers on. Can I do that reliably? I don't know for sure, probably though..

But yeah, it's a big project. I did a lot of work on paper, got a little overwhelmed with the idea of actually implementing it. I've been doing more software than hardware stuff lately, but this Squeedo Jr. thing is an idea that I'd really like to revisit.

aquasnake: Yeah, I agree that an MCU would be technically better. I've considered the PIC32 and STM32 (in designs very different than this one), and actually did make one with PIC18F like 16 years ago. To me though, it wouldn't feel like NES development anymore. With the 6502 core, one could take their existing NES code, still use the same toolchain, and run it on a faster CPU (faster than 2A03, but pathetically slow compared to 200mhz 32-bit MCU!)

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aquasnake
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Re: Was there an NES expansion chip like SA-1

Post by aquasnake » Sat Jan 30, 2021 2:34 am

The dual 6502 processors, by sharing $6000 - $7fff. The cart carries a noac (umc6561). The two systems run different codes respectively, and shake hands through IRQ. All buses need level shifters for separation.

It looks like the VS system?

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Re: Was there an NES expansion chip like SA-1

Post by Memblers » Sun Jan 31, 2021 2:27 am

aquasnake wrote:
Sat Jan 30, 2021 2:34 am
The dual 6502 processors, by sharing $6000 - $7fff. The cart carries a noac (umc6561). The two systems run different codes respectively, and shake hands through IRQ. All buses need level shifters for separation.

It looks like the VS system?
Now that is a fun idea. If the cart also had A/V output and controller input for that side, then it looks even more like a VS system.

Pros:
+ Dual 2A03 expansion audio !!
+ off-the-shelf part. Maybe a dusty old shelf.
+ second screen could be fun for debug output (normally I just use ASCII out the controller port, to a terminal)
Cons:
- DPCM channel might sound weird?
- Cost from high parts count, needs memory and mappers for both sides
- availability for 6561?

Maybe 10 years ago I found a supplier that claimed to have UM6561. I got a quote from them and IIRC, they had like 600+ of them, and wanted something like $10 each. I thought about making my own clone system for the fun of it, but decided not to.

stan423321
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Re: Was there an NES expansion chip like SA-1

Post by stan423321 » Mon Feb 01, 2021 6:10 am

Hey, this thread sounds relevant to my noobish ideas.

In general, I agree about the CPU not being the part of the NES that would particularly benefit from boosting using era-approproate hardware. There's a lot of stuff one could do to slightly reduce its workload which is way less complicated. Bake some identity tables and whatnot into the board, for instance. I looked at opcode replacement and I don't think NES has the circuitry which makes that viable.

In comparison, there are a lot of things that could have been done with PPU part of the cartridge and just... haven't. Column shifting? Palette scrambling? 16x16 tiles? I'm no expert, but sounds doable. 8x1 tiles manipulated by CPU may be overkill, but mode with 8x8 tiles with individual line palettes would still add some options for artists while barely touching CPU at all.

There is one setup I came up with which involves a 6502 (~) on a cart, and is too goofy not to share. Non-Famicom NESes either lack audio pins or have them on the extra connector. What if we used 2A03 as a PCM and PPU register pump while running the game code on cart?

It appears that OAM DMA results in unacceptably long update period, but the cycle reference chart suggests 2A03 could fill OAM without it and have some writes to spare if the data was pushed into the opcode stream (6 cycles per byte). Is this correct?

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Re: Was there an NES expansion chip like SA-1

Post by lidnariq » Mon Feb 01, 2021 1:48 pm

stan423321 wrote:
Mon Feb 01, 2021 6:10 am
In comparison, there are a lot of things that could have been done with PPU part of the cartridge and just... haven't. Column shifting? Palette scrambling? 16x16 tiles? I'm no expert, but sounds doable. 8x1 tiles manipulated by CPU may be overkill, but mode with 8x8 tiles with individual line palettes would still add some options for artists while barely touching CPU at all.
I think the hard thing for PPU augmentation is coming up with an interface that's easy to work with. We can't just give the user access to a weird bitmap. (Color a Dinosaur isn't particularly compelling)

If we make PPU RAM dual-ported instead of the current required queue, we probably want to provide double-buffered nametables to avoid tearing.

I have to wonder a bit about just how much visual improvement one can throw in and still have it feel like a NES game. Tepples made concept art for a port of Cookie Clicker that used a variable-width font and took some heat for it looking inauthentic, despite having used VWFs extensively in actual NES software he'd written before and since.

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Re: Was there an NES expansion chip like SA-1

Post by tepples » Mon Feb 01, 2021 8:44 pm

If you're curious about what lidnariq is referring to, I mocked these up in first quarter 2014 targeting SNROM. Some of the more complex scenes would be even easier now that MMC3 with 32K CHR RAM is affordable.

Image
[Mock] Title screen

Image
[Mock] Big cookie with moving cursors

Image
[Mock] Buildings

Image
[Mock] Upgrades with golden cookie notice

I got as far as making a floating-point math library until I quit due to wrist pain.

Oziphantom
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Re: Was there an NES expansion chip like SA-1

Post by Oziphantom » Wed Feb 03, 2021 12:44 am

Seems there is a MXM-0 mapper overcomes current NES limits. Not sure what it does though. Probably just graphics related.

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