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 Post subject: General Qs...
PostPosted: Wed Oct 17, 2018 9:27 pm 
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So I been reading some gb dev tutorials lately.
Some quetions:

Are there innate subroutines (call - ret)?
Are the only jp instructions on z,nz,c,nc?
Are there (hl) index instructions?

Thank you.

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 Post subject: Re: General Qs...
PostPosted: Thu Oct 18, 2018 5:19 am 
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olddb wrote:
So I been reading some gb dev tutorials lately.
Some quetions:

Are there innate subroutines (call - ret)?

I'm not sure what you mean by "innate".

olddb wrote:
Are the only jp instructions on z,nz,c,nc?

Correct. Because the LR35902 is ultimately based on an ISA of a programmable terminal,[1] there is no flag for bit 7 of the last result nor overflow of signed addition. But it has those conditions for all thre kinds of jump (16-bit jp, 8-bit relative jr, and call).

olddb wrote:
Are there (hl) index instructions?

No. You have to calculate each address yourself, and it takes 7 mcycles to calculate the address and perform the read or write. Assuming a pointer to the start of the struct is in DE:
Code:
  ld hl,offsetof(type, field)
  add hl,de
  ld a,[hl]

(offsetof is not assembly language; it is a commonly used macro in C or C++ that calculates the offset of a field within a particular type. I used it in this example because people familiar with C might understand the logic. The rgbds-structs library by ISSOtm offers ways to declare structs in assembly language.)

To make this faster, you're expected to know in advance in what order the elements of each struct will be read or written and then order the elements that they are accessed in increasing order (for ld a,[hl+], decreasing order (for ld a,[hl-]), or with addresses separated by a power of 2 (for e.g. set 3,hl ld a,[hl]).


[1] The LR35902 is largely based on the Intel 8080, with some bit manipulation instructions borrowed from the Zilog Z80. The 8080 in turn a reorganization of the Intel 8008 for more general use, which began as an experimental single-chip implementation of the processor in the Datapoint 2200 terminal. But the ISA's focus on sequential access to homogeneous data, such as a terminal's tilemap, rather than random access to heterogeneous structures, such as actors in a game, is still evident.


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 Post subject: Re: General Qs...
PostPosted: Thu Oct 18, 2018 5:38 am 
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If you put an array (smaller than 256) at exactly a page edge, like xx00.

You could easily index into it by loading the index value to L.

ld H, array high byte
ld L, index
ld A, [HL]

You would do this, for example, with the OAM shadow RAM (or buffer, if you prefer that term).

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 Post subject: Re: General Qs...
PostPosted: Thu Oct 18, 2018 2:25 pm 
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As long as they're not bigger than 256 bytes, you can also ensure that your structures never overlap page boundaries, which means that even if HL is a pointer to an arbitrary location, you only need 8-bit math:
Code:
LD HL, StructureBase
LD A, ValueOffset
ADD L
LD L, A

Using RGBDS, I put sentinel values at every page boundary to ensure that my linker never places a structure so that it spans across pages.


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 Post subject: Re: General Qs...
PostPosted: Thu Oct 18, 2018 6:42 pm 
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Thank you.

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