Yes and no. With my idea it could be realized with about ~4 discrete chip I guess. If you do only that then it's a waste of a CPLD, but if you combine that with a MMC3-class or even a simpler MMC1-class mapper then it's definitely no waste.In [url=http://forums.nesdev.com/viewtopic.php?p=146074#p146074]this post[/url], Myask wrote:So what sort of CHR-banking (and PRG, I suppose) would be sensible, as it seems like "just" adding 8x8 attributes seems like a waste of CPLD?
Well I'd take simple (identical to Name Table) addressing over a complicated bit scheme that is extremely annoying to go by, and very unsuited to the little 6502 CPU which can only shift one register one bit at a time... With ARM the attribute tables of the NES wouldn't be so much of a painIt just sounds like a waste of space to dedicate the an entire 1KB to attributes, while all you really need is 240 bytes. Couldn't we use the rest of this memory as a name table for status bars or something?
But I think it might be possible to have 8x2 attributes by divinding the byte in the neo-attribute-table into four regions of 2 pixels height, each one having it's own 2 bits. This would definitely require a CPLD, as it'd need highacking the data line of the CHR-RAM in very specific fashion.