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PostPosted: Sun Nov 01, 2015 8:26 am 
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Posts: 437
The x86 architectures has two address spaces: memory and I/O. Everything you've done so far has been in the memory space, which isn't surprising since it's the more commonly used of the two. The one you're looking at now is the I/O address space.

You can only access the I/O space with a few instructions. They are in, out, insb, insw, outsb, and outsw. You'll mostly only want to use in and out for now. Those two instructions haven't changed much in the lifespan of the x86 architecture, so even modern resources can teach you how to use them. (Of course, ignore the parts that reference 32-bit anything, since the V33 is 16-bit.)


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PostPosted: Sun Nov 01, 2015 9:11 am 
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Joined: Mon Sep 15, 2014 4:35 pm
Posts: 3071
Location: Nacogdoches, Texas
Wait a minute, I just saw something...

Quote:
Master Control registers:
Word 0: Playfield 1 control
Bit 0x40: 1 = Rowscroll enable, 0 = disable
Bit 0x10: 0 = Playfield enable, 1 = disable
Bit 0x04: 0 = 512 x 512 playfield, 1 = 1024 x 512 playfield
Bits 0x03: Playfield location in VRAM (0, 0x4000, 0x8000, 0xc000)
Word 1: Playfield 2 control (as above)
Word 2: Playfield 3 control (as above)
Word 3: Raster IRQ position.

If a bit has to be 0 to enable BGs, doesn't that mean that they should already be enabled? Unless everything starts out 1 filled.

Edit: Oh, wait, everything does start out 0 filled, so every BG is enabled by default. I just moved graphics into the first tile of BG chr rom.


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