I go with the unrelated approach as then you don't have to deal with upper bits within L that would differentiate more of the same within a page. Incrementing H to the next thing while INC/DEC L or directly specify L for accessing the elements of a particular thing. If performance is not absolutely critical you can do many of the same within a page and juggle the top bits of L while accessing elements out of order, but if you can make all accesses sequential it will be most space efficient.
Space isn't a problem to me usually, current project on SG-1000 / SC-3000 uses a RAM expansion since 1KB is not enough for my needs (while 2KB would be but only SC-3000 has that, SG-1000 has only 1KB) and cheapest RAM chip is 32KB, so it is made usable by a custom mapper that puts it in top 16KB where system RAM is (onboard RAM gets disabled) + a bit to choose which of the 16KB halves is visible there (Multiple RAM banks would requre another IO pin and more state in the CPLD and I got more of neither available).