Toshiba TLCS900/H instruction timings?

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Near
Founder of higan project
Posts: 1553
Joined: Mon Mar 27, 2006 5:23 pm

Toshiba TLCS900/H instruction timings?

Post by Near »

Hi all, I've been working on a new Toshiba TLCS900/H CPU core for a new Neo Geo Pocket (+Color) emulator, but I'm having some trouble finding good information on instruction timings.

There doesn't appear to be timing information, at least not understandable to me, in the official documentation.
(Google search for "tlcs900/h1 pdf", second link.)

I found these old threads:
* https://forums.nesdev.com/viewtopic.php?f=23&t=10026
* https://forums.nesdev.com/viewtopic.php?f=23&t=9383

But the information doesn't seem complete.

All the cores based around NeoPop has entire instruction cycle counts, but I don't know where they came from, and it would seem most people online agree the timing of these emulators isn't so great, so I'd like to do better if possible.

Can anyone point me at some better documentation?

While I'm at it, I'm guessing I'm not going to get any test ROMs to debug my TLCS900/H core ... ^-^;;
That's going to be really rough ... this CPU ended up being more complex (and more code) than my M68K core.

For whatever it's worth, in case anyone is feeling super generous about helping ...
Current code is here: https://gitlab.com/higan/higan/tree/mas ... r/tlcs900h
But wait for v106r83 in day or so to land, as I fixed LDA and one instruction that was taking a (#8) instead of (#16).

Thanks in advance! :D
ndiddy
Posts: 33
Joined: Tue Oct 24, 2017 11:07 pm

Re: Toshiba TLCS900/H instruction timings?

Post by ndiddy »

The H1 isn't the same as the "original" 900H, I think it says in the manual that it's a newer 32-bit variant. Anyway, I guess I'm pretty good at data hoarding, as the site I downloaded this stuff off of is down now. The info you want is probably in the file named "e_900h_chap3_cpu_6.pdf", but you want to be using the right docs (why I'm including the rest, since I can't find them online).
https://drive.google.com/open?id=1p7P-L ... GCABe3vqg5
Hidden Asbestos
Posts: 2
Joined: Thu Feb 07, 2019 3:34 pm

Re: Toshiba TLCS900/H instruction timings?

Post by Hidden Asbestos »

Hello. I'm the original author of NeoPop.

It's been a very long time since I worked on this project and it's also a complete accident that I stumbled upon this thread. I'm glad you've decided to take a fresh look at the CPU code as I'm still surprised that something I worked on nearly 20 years ago is still apparently good enough for people to keep re-using it, despite the fact that it's literally 'my first CPU core' and it leaves a lot to be desired.

I'm not sure I'll be able to help you much but I can at least confirm that the instruction timings are pretty much made up and have no bearing on the real hardware (fun fact: I've never owned or even held a real NGP/C, let alone run any tests on it myself). IIRC there's no compensation for the different addressing modes, etc. So if you're looking for where these numbers came from - me. Fortunately it's a very forgiving system.

I still have some documents / SDKs and such from back in the day which I'm not sure if you have or can be found. I'm happy to share. For timings I think the datasheet will probably be your best bet, it has the number clocks/states for each instruction.

Best of luck :)

edit: Here's the datasheet, it was my primary source for implementing the CPU. Hope this link works!:
https://drive.google.com/open?id=1DgmBc ... 8VXU9KXGO-
odabugs
Posts: 1
Joined: Tue Jan 22, 2019 6:58 pm

Re: Toshiba TLCS900/H instruction timings?

Post by odabugs »

Hello,

I have a few datasheets for various product codes of this CPU that I got off Toshiba's website a few years ago. It appears there were several minor variations on the TLCS-900/H core (not counting the sister cores like L, H1, etc.), but skimming over the documents I haven't found any differences between them that would be relevant to emulation--the timing datasheets were identical across the board, and I didn't see any mention of special features or implementation quirks specific to one model or another. Aside from the datasheet with total cycle counts for each instruction and the signal timing diagrams, I haven't found any more detailed breakdown on what's going on cycle-by-cycle in each TLCS instruction, and it doesn't appear to be an area that's been explored by test ROMs. I also couldn't find any conclusive statement saying one way or another which TLCS model number is used in the NGP/C, or whether the sound CPU is different at all from a standard Z80 core. If you still want them all, I can slap them up on a Drive or check if they're still available on Toshiba's site. I'm not sure what this forum's policy is when it comes to linking official first-party console docs, but dedicated NGP/C technical docs from SNK (in Japanese and English) can still be readily found on at least one site that I know of.

If you haven't already, you may want to ask over at forum.freeplaytech.com as well. I'm not sure how much it helps, but I can run test ROMs on hardware (including link cable tests) if needed.
Near
Founder of higan project
Posts: 1553
Joined: Mon Mar 27, 2006 5:23 pm

Re: Toshiba TLCS900/H instruction timings?

Post by Near »

The info you want is probably in the file named "e_900h_chap3_cpu_6.pdf", but you want to be using the right docs (why I'm including the rest, since I can't find them online).
Thank you very much! I took a diversion from the NGPC code to do some rather unexpectedly intense core restructuring, but I'm gearing up to resume work on the NGPC now. I'll take a look through these docs, much appreciated!

I found a few random 900/H PDFs, usually in Japanese (which was fine), to describe the 900H-only functionality like LDX. Then I found an English one for the 900/H control register map. But for the most part, the docs are from the 900/H1. There were notes about the differences between the 900, 900/H, and 900/H1, so I tried to steer clear of doing anything 900/H1 specific.

Still, better to use 900/H docs, definitely!
Hello. I'm the original author of NeoPop.
It's an honor! Thank you for stopping by!
it's literally 'my first CPU core'
Wow! It is an absolute beast of a CPU. It's larger than my 68K core, and barely anyone in the world uses it or talks about it. No test suites exist for finding implementation issues (zexall, ARMwrestler, krom/65816, etc) either.

My hat is off to you. There is no way I could have ever done this as my first core.
I can at least confirm that the instruction timings are pretty much made up and have no bearing on the real hardware
Thank you for confirming that, at least. I completely understand that in absence of good information, we have no choice but to make reasonable guesses. Bit of a shame though, this is also the first CPU I've worked on where I can't even find a simple abstract list of instruction timings.
Fortunately it's a very forgiving system.
That's going to be my saving grace, for sure, heh.

Right now I have things running far along enough to put a bunch of pixel patterns into RAM, but nothing that remotely resembles the BIOS logo yet. I usually start with Mednafen trace logs to compare to my newer CPU core to find obvious logic bugs, but in this case, it looks like an HLE BIOS was used. Guessing this is because 20 years ago, the BIOS wasn't dumped yet.

(Believe it or not, it's 2019 and we still haven't been able to dump the WonderSwan boot ROMs.)
For timings I think the datasheet will probably be your best bet, it has the number clocks/states for each instruction.
The raw bus timings on 38 unfortunately don't tell us anything about instruction timings. Page 165's "states" list looks promising, but it doesn't begin to attempt to explain what is going on with each state.

Well, I suppose it's a very good start. Thanks again for stopping by, and your past work on NeoPop!
I can run test ROMs on hardware (including link cable tests) if needed.
Thank you as well!

The thing I need more than anything right now are some good instruction trace logs from a working CPU core. I think I'm going to have to bite the bullet and figure out how to use MAME's debugging functionality to try and create a trace log of the NGPC BIOS running.

Once I have the system up and functional, I'm fairly certain some hardware tests would be needed, so if you don't mind me asking you later on, that could definitely come in handy, thank you!
Hidden Asbestos
Posts: 2
Joined: Thu Feb 07, 2019 3:34 pm

Re: Toshiba TLCS900/H instruction timings?

Post by Hidden Asbestos »

byuu wrote:
it's literally 'my first CPU core'
Wow! It is an absolute beast of a CPU. It's larger than my 68K core, and barely anyone in the world uses it or talks about it. No test suites exist for finding implementation issues (zexall, ARMwrestler, krom/65816, etc) either.

My hat is off to you. There is no way I could have ever done this as my first core.
Thanks! It's brought back a lot of nice memories of that time, it's not something I've really talked about much since then so it's nice to reminisce. Hope you don't mind an old timer rambling on for a bit:

The history of NeoPop was that I was a 3rd year uni student and enjoying a bunch of emulators like ZSNES, Genecyst, Nebula, etc., checking out games I never had the money for as a kid and enjoying fresh breakthroughs like CPS-2 decoding and dumps of new games in the KOF series, etc. Reading retrogames.com every day at the computer lab for updates on the latest emulators (no internet access in our poor student flat!) My flatmates and me were into NeoGeo fighting games and then we learned about the pocket and I thought it was kinda neat to see 8-bit versions of these arcade games.

At the time I started the project the only other decent emulation of the system was called 'MHE - Multiple Handheld Emulator' and it did a bunch of things like GameBoy, etc. IIRC it didn't support joysticks and had a few niggling front-end issues. It was closed source and so in order to make the front-end stuff better it was required to emulate the system.

My flatmate found that CPU datasheet and we laughed at how it had an insane number of registers and that kind of absurdity has always been attractive to me. So as a kind of 'hold my beer' moment I had a go at implementing some instructions and it sort of snowballed into running some public domain homebrew ROMs with the true goal of commercial software running to keep me going. Honestly, if the CPU had an emulator available for it I would have used that, but there wasn't so I just got on and did it -- laborious work but not too hard.

By the time most of the games were basically working I briefly turned my attention to emulating the BIOS but since the goal was just to play obscure Japanese games on it for free (rather than the more noble goal of accuracy and preservation that you've done with higan, etc.) my enthusiasm fizzled out - which also coincided with me graduating and using NeoPop as a demo to land me my first games industry job. I parked the project and never returned.

My main regret is that it doesn't run the Dive Alert intro properly - I believe that's something to do with timings that causes the corruption there. I think most of the other games were probably written quite simply without many complex hardware tricks - and I'm pretty sure the fighters were all just reskins of the same engine. Like I said, it's a forgiving system because nothing was written to be all the sensitive to timing, so I got good results even when cutting corners like this.
byuu wrote:Right now I have things running far along enough to put a bunch of pixel patterns into RAM, but nothing that remotely resembles the BIOS logo yet. I usually start with Mednafen trace logs to compare to my newer CPU core to find obvious logic bugs, but in this case, it looks like an HLE BIOS was used. Guessing this is because 20 years ago, the BIOS wasn't dumped yet.
I did have the BIOS dump but it did a bunch of hardware initialisation checks that I was too lazy to figure out - an HLE bios is good enough for games to work and I didn't have the motivation to spend the amount of time it takes to do it properly - for the sake of a calendar app, etc. You certainly have my respect when it comes to your dedication to accurate Super Nintendo emulation, I was just hacking together something that worked for fun :) Like you said it's not something you can find much info on, it's just not a sexy CPU that gets much attention and the platform itself isn't too massive, so here we are 20 years on with no progress.

--

I've put together a zip of some ROMs that might help. They're much more basic public domain roms that will help you get things working without even implementing all of the instructions. There's a CPU test rom ("CPU Test by Judge_ (PD).zip") in there which will run some instructions and tell you if there's an error in your implementation.

Also in the notes folder, check out the 'old diary.txt' and 'old readme.txt' as I mention what ROMs I got working first - should help identify the simpler ones.

https://drive.google.com/open?id=18uPO5 ... ks42qJraDS

If you've got any more questions, happy to answer them here or DM me on Twitter.

Cheers
neopop_uk :)
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