Wonderswan 2003 extended banking register width

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lidnariq
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Wonderswan 2003 extended banking register width

Post by lidnariq » Thu Jan 30, 2020 8:00 pm

The WonderSwan 2001 mapper IC has four banking registers, already well-documented:

I/O to port 0C0h: select 1MB bank (i.e. A20 up) in linearized x86 addresses 40000h-0FFFFFh
I/O to port 0C1h: select 64KB bank in linearized x86 address 10000h-1FFFFh
I/O to port 0C2h: select 64KB bank in linearized x86 address 20000h-2FFFFh
I/O to port 0C3h: select 64KB bank in linearized x86 address 30000h-3FFFFh

It's known that the 2001 only supports addressing 16MB of data, and the register at port 0C0h only implements 4 bits. (For readback too. The comment "All 8 bits hold state" in WSMan is wrong. Upper bits always read back as 0.)

In the 2003 mapper IC, two more address pins were added. While the above registers exist, and it's easy to extend the definition for the 1MB bank for this (and they did!), the other three bank select registers have already used up their full eight bits.

So they added mirrors with space for the extra bits!

I/O to port 0CFh: alias to port 0C0h. Value written in either can be read back from either. Six bits exist; upper two bits always read back as 0.
I/O to port 0D0h: alias to port 0C1h.
I/O to port 0D2h: alias to port 0C2h.
I/O to port 0D4h: alias to port 0C3h.

I/O to port 0D1h: control A24 and A25 during access to segment 1000h. Two bits exist; upper six bits always read back as 0.
I/O to port 0D3h: control A24 and A25 during access to segment 2000h. &c.
I/O to port 0D5h: same, segment 3000h.

It's clearly intended that 16-bit I/O access (e.g. out 0D0h, ax) is used on these expanded registers.

No games were released with more than 16MB of ROM, so this functionality is irrelevant.


In both the 2001 and 2003, all of the banking registers seem to usually power up holding all 1s. The Wonderswan IPL assumes this is true – it expects the ROM header to be found at 3FFFXh. The Wonderswan Color IPL explicitly writes FFh to both 0C2h and 0C3h before reading the ROM header from the same address.


One more piece of trivia related to the 2003: GPO pins disabled by writing 0 bits to port 0CCh both 1- have a weak pull-down on the physical pin, and 2- always read back as 0 from port 0CDh. Writes to 0CDh are still tracked even when the pin's output is disbled.

edit: One piece of trivia I learned from Sanni's cart dumper: Three releases connected LEDs to the GPO. Sanni only mentions the game SWJ-BANC33 ("One Piece: Treasure Wars 2"), where it uses the two lsbits in the register enable one LED each. (on the PCB: "WSS-0003"). Ototo2009 mentions that one release of SWJ-BANC36 ("Kidou Senshi Gundam Seed") also is on this PCB, but the LEDs are not populated. Finally, Ototo2009 also has photos of the pregnancy tracker (yes, really) MM-280 ("Mame Mitte' ") where its "WS-0001-T" PCB has one LED.

(last edit: 2020 august 26 at 16:38 UTC-7)

lidnariq
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Wonderswan 2003 self-flashing register

Post by lidnariq » Sun Aug 23, 2020 7:28 pm

The register at I/O 0CEh is known to be used by the WonderWitch devkit, but it's actually present on every 2003 IC.

The way it works is:
Upper 7 bits: always 0
Bottom bit: when 0, access to memory 10000-1FFFFh addresses RAM, as normal.
when 1, access to 10000-1FFFFh addresses ROM.

This wouldn't be useful in isolation, because all existing carts use the ROM in 16-bit mode, and the WonderSwan itself can only access this region in 8-bit mode.

However, on the PCB containing the WonderWitch (PTS-0101), mapper pin 23 is connected to Flash /BYTE, and mapper pin 24 is connected to D15. So it can transparently change these values depending on the address, and the game can access the same data in ROM either way. (This means that the WonderSwan must leave D15 undriven during byte-wide access so that the 2003 can drive it. Not surprising in hindsight.)

On other carts (e.g. PTS-0133) that don't connect these pins, the ROM will still act in 16-bit mode (and A0 isn't connected), so only the little end can be read, and it always twice. (e.g. if ROM held 1234h 5678h, then the bytes read would be 3434h 7878h)

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olddb
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Re: Wonderswan 2003 extended banking register width

Post by olddb » Mon Aug 24, 2020 3:14 am

I would like to write something for the Wonderswam, mainly as a way to learn some x86.
What are your assembler recommendations?
...

lidnariq
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Re: Wonderswan

Post by lidnariq » Mon Aug 24, 2020 10:14 am

I liked tasm when I was still writing lots of real-mode code. Nowadays I'd probably use nasm.

I've been working on assembling a bit of a minimalist devkit for the WS, but need to actually write an example first.

Pokun
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Re: Wonderswan 2003 extended banking register width

Post by Pokun » Tue Aug 25, 2020 2:34 pm

I'm also interested in a minimalist devkit. WonderSwan seems to be a system that people code in C for (or is that mainly WonderWitch homebrew?) so an assembly alternative would be great. But I would probably need some minimalist set of tools and quick-start guide to get started.

Neo-Geo Pocket, WonderSwan and Game Boy Advance are all systems that seems to border between using assembly and C, and that means all development tutorials would be for C.

lidnariq
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Re: Wonderswan

Post by lidnariq » Tue Aug 25, 2020 2:45 pm

Well, there's this implementation of Snake for the WSC...

Pokun
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Re: Wonderswan 2003 extended banking register width

Post by Pokun » Thu Aug 27, 2020 3:04 am

In assembly and no fancy build process, perfect! Thanks!

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olddb
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Re: Wonderswan

Post by olddb » Sat Aug 29, 2020 12:22 pm

lidnariq wrote:
Mon Aug 24, 2020 10:14 am
I liked tasm when I was still writing lots of real-mode code. Nowadays I'd probably use nasm.

I've been working on assembling a bit of a minimalist devkit for the WS, but need to actually write an example first.
Thank you. :)
How can I limit nasm to only accept wonderwsam compatible instructions?
Last edited by olddb on Sat Aug 29, 2020 10:03 pm, edited 1 time in total.
...

lidnariq
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Re: Wonderswan

Post by lidnariq » Sat Aug 29, 2020 12:49 pm

cpu 186

The Japanese manual for the V30MZ core says that it lacks the fun/weird/dubiously useful instructions of the discrete V30, so it looks like it's "just" a high instructions-per-clock 186.

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