Megadrive VDP H40 timing

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lidnariq
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Megadrive VDP H40 timing

Post by lidnariq » Sat Jul 18, 2020 7:11 pm

NTSC Megadrive just runs on NTSC*15 master clock, and in H32 each pixel is 10 master clocks and there are 342 pixels each scanline.

Why is "correct" H40 (0x81) made of 420 pixels, of which 30 are 10 master clocks long and the other 390 are 8 master clocks long? I can guess why they wanted to maintain a total that was still 3420 master clock cycles, but why 390·8+30·10 instead of, say, 425·8+2·10 ?

(Has Nemesis or someone else already addressed this somewhere else? I couldn't find the right magic words to search for to find out...)

tepples
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Re: Megadrive VDP H40 timing

Post by tepples » Sun Jul 19, 2020 1:24 pm

I've forwarded the question to the Discord server linked at the bottom of Plutiedev.com.

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TmEE
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Re: Megadrive VDP H40 timing

Post by TmEE » Sun Jul 19, 2020 2:40 pm

H320 is normally using external pixel clock which is 8/9/10 cycles during HSync period, to gain same timings as H256 with its only 10 clock long pixels. When internal pixel clock is used for H320 it turns "H320F" where lines last less time and line rate becomes higher. (H256F is H256 with external pixel clock rather than internal one).

Code: Select all

MD video timings ------------------------------------------------------------

MCLK is 53203424 Hz in PAL machines and 53693175 Hz in NTSC machines and all
timings are based on those frequencies. There are two pixel clock frequencies
used in MD : MCLK / 10 (slow pixels) and MCLK / 8 (fast pixels). The VDP can
generate these internally but can also use external pixel clock (EDCLK) which
uses fast pixel timing outside HSYNC and pattern of 1 fast, 7 slow, 2 medium,
7 slow during HSYNC. Medium pixels last 9 x MCLK cycles. Because HSYNC is an
open drain signal it has soft rising edge and it causes some uncertanity
regarding end of HSYNC which has implications on EDCLK that is used in H320.
HSYNC in H320 could be 33 pixels, with blanking having 31 pixels but in that
case one of the blanking pixels will be slow, and that will complicate the
matters a little bit, I have assumed here that blanking is only fast pixels.
Video timings are dependent on if EDCLK is used also.

Composition of one line :
+----------------+-----+------+-------+------+
|                | SMS | H256 | H320F | H320 |
+----------------+-----+------+-------+------+
| HSYNC pixels   |  26 |   26 |    32 |   34 |
| Left blanking  |  24 |   25 |    32 |   30 |
| Left border    |  14 |   14 |    13 |   13 |
| Active display | 256 |  256 |   320 |  320 |
| Right border   |  14 |   14 |    14 |   14 |
| Right blanking |   8 |    7 |     9 |    9 |
+----------------+-----+------+-------+------+
| Total pixels   | 342 |  342 |   420 |  420 |
+----------------+-----+------+-------+------+

Code: Select all

VDP pixels and MCLK cycles per full line :
+--------------+-------+-------+-------+-------+
|              |  H256 | H256F |  H320 | H320F |
+--------------+-------+-------+-------+-------+
| Slow pixels  |   342 |    21 |    28 |   420 |
| Med. pixels  |     0 |     3 |     4 |     0 |
| Fast pixels  |     0 |   318 |   388 |     0 |
+--------------+-------+-------+-------+-------+
| Total pixels |   342 |   342 |   420 |   420 |
+--------------+-------+-------+-------+-------+
| Slow cycles  |  3420 |  2544 |   280 |     0 |
| Med. cycles  |     0 |    27 |    36 |     0 |
| Fast cycles  |     0 |   210 |  3104 |  3360 |
+--------------+-------+-------+-------+-------+
| Total cycles |  3420 |  2781 |  3420 |  3360 |
+--------------+-------+-------+-------+-------+

Code: Select all

Video timings using 53203424 Hz and 53693175 Hz clocks found in MDs :
+-------------------+----------------------+----------------------+
|                   |          PAL         |         NTSC         |
|                   +-----------+----------+-----------+----------+
|                   | HSYNC kHz | VSYNC Hz | HSYNC kHz | VSYNC Hz |
+------+------------+-----------+----------+-----------+----------+
| 50Hz | H320, H256 | 15556.557 | 49.70146 | 15699.759 | 50.15897 |
|      | H320F      | 15834.352 | 50.58898 | 15980.112 | 51.05467 |
|      | H256F      | 19131.040 | 61.21535 | 19307.147 | 61.68417 |
+------+------------+-----------+----------+-----------+----------+
| 60Hz | H320, H256 | 15556.557 | 59.37617 | 15699.759 | 59.92274 |
|      | H320F      | 15834.352 | 60.43646 | 15980.112 | 60.99279 |
|      | H256F      | 19131.040 | 73.01924 | 19307.147 | 73.69139 |
+------+------------+-----------+----------+-----------+----------+

tepples
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Re: Megadrive VDP H40 timing

Post by tepples » Sun Jul 19, 2020 3:24 pm

Rephrasing: Why is it 420 pixels and not 427?

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TmEE
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Re: Megadrive VDP H40 timing

Post by TmEE » Mon Jul 20, 2020 2:15 am

I imagine the "why" is deeply rooted in the video generation logic, and probably has to do something with extending H256 to add extra pixels for making H320 but the guy in charge probably wasn't thinking about timings all that much and only added a new 64 pixel column and whatever it takes to get enough pixels to render the extra sprites...

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