A question about UxROM implementation

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Fisher
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A question about UxROM implementation

Post by Fisher » Sun Sep 18, 2016 6:12 pm

Hello.
Sometime ago, I remember to have read something about implementing a UxROM solely with an 74'373, some resistors and 2 transistors.
I've tried some crazy configurations, but none worked.
Could someone please explain, or better, draw me some schematics to make it easier for me to understand?
Thanks in advance!

lidnariq
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Re: A question about UxROM implementation

Post by lidnariq » Sun Sep 18, 2016 6:35 pm

If you take the original UxROM image, and divide it into 16 KiB slices (let's call them "0" through "7"), and reassemble those 16 KiB slices in this specific order: 0717273747576777
And then burn it onto a BNROM-class cartridge. In this way, you can convert a 256 KiB BNROM board into a 128 KiB UNROM without any rewiring.

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Fisher
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Re: A question about UxROM implementation

Post by Fisher » Sun Sep 18, 2016 7:02 pm

Cool!!
Great hacking info! Thanks!!
But what I want to do is to use an 74'373 instead of a 74'161, mainly bacause 74'373s are easier for me to get.
Maybe using it together with the 74'32 would be a option, but I fear to end with a board as messier as this one I've built yesterday:
Battletoads D. Dragon - Components
Battletoads D. Dragon - Components
Battletoads D. Dragon - Soldering
Battletoads D. Dragon - Soldering
I've felt just like Dr. Frankenstein, and screamed: It's alive!! It's alive!!
I should already know that most of the time good looking != functional :-)
Battletoads D. Dragon - Screen
Battletoads D. Dragon - Screen
Well... a little bit less components on the junk pile, and lots of fun for me and my daughters!
I even patched it with the infinite lives code. I bet that even my 5yr old can finish this game!! :lol:

tepples
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Re: A question about UxROM implementation

Post by tepples » Sun Sep 18, 2016 7:07 pm

The 74373 is a 3-state latch that outputs the bank number only when /OE (pin 1) is low. Tie /OE to A14, and tie Q0-3 high through resistors of appropriate value. Then I think the transistors are to calculate the latch's active high write enable: LE (pin 11) = /ROMSEL NOR R/W

Source: NXP 74HC373 data sheet

lidnariq
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Re: A question about UxROM implementation

Post by lidnariq » Sun Sep 18, 2016 7:08 pm

Oh, right, specifically the 74'373. The NES can interface with a 74'377 without any extra parts, but to use a '373 you'll have to generate the +LATCH pulse.

So you want something that is high only while /ROMSEL is low and R/W is low. Sounds like a NOR gate?

What kind of transistors do you have? I guess you could be silly and just build a (needlessly complicated) full TTL NOR gate: http://www.allaboutcircuits.com/textboo ... -or-gates/

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Re: A question about UxROM implementation

Post by tepples » Sun Sep 18, 2016 7:12 pm

Transistor Gates has the schematic of a NOR gate with two transistors and three resistors, as well as the schematic of a NOR gate with one transistor and three resistors.

Bonus: You may be able to run this latch enable signal to your flash memory's /OE (with /ROMSEL itself on /CE) and prevent bus conflicts.

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Fisher
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Re: A question about UxROM implementation

Post by Fisher » Sun Sep 18, 2016 7:23 pm

Thanks!!
Great info!!
You guys are great!
I'll try this tomorrow and see what I can get.

What values should I try for the resistors? 10k maybe? Or it's too high?
Looks like I'll have lots of experiments to do this holiday!! :lol:

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