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64MBit ExLOROM SRAM Problem

Posted: Wed May 03, 2017 7:04 am
by Ice Man
So, I just recently got to know that LoROM games can actually be 64MBit large.
I tried to solder Wizardry VI for someone, while the game works it freezes once you save.

This is how I soldered the game on a SHVC-1A3M-XX Board with replacing the SRAM with a HY62256A:
Bent up Pin 1 and 30 of SRAM.
Soldered Pin 1 to ROM A14.
Soldered Pin 30 to ROM A13.

ROM1: MBM29F033C using TSOP Type III Adapter.
ROM2: AM29F016B using TSOP Type III Adapter.
Both piggybacked leaving the /OE lines disconnected.

Added a 74LS139 to decode A23.
Pin 1 = SNES /OE (Cart #49)
Pin 2 = SNES A23 (Cart #48)
Pin 3 = GND
Pin 4 = ROM2 /OE
Pin 5 = ROM1 /OE
Pin 8 = GND
Pin 16 = VCC

All other pins are NC.

While the game boots and runs fine from my testing so far, it crashes once you want save a character.

Anyone know what's wrong?

P.S. Even tried decoding the SRAM like HiROM with A13 and A14 being connected to A16 and A17, didn't help.

Re: 64MBit ExLOROM SRAM Problem

Posted: Wed May 03, 2017 10:28 am
by lidnariq
Ice Man wrote:So, I just recently got to know that LoROM games can actually be 64MBit large.
Pedantic: the bigger-than-32Mibit LoROM games are a homebrew/romhacking invention.
Pin 1 = SNES /OE (Cart #49)
Pedantic but actually very important to not screw up: That's ROM/CE, not ROM/RD. For ROMs you can sometimes swap them, but doing so doesn't help things.
Pin 4 = ROM2 /OE
Pin 5 = ROM1 /OE
And nothing further filters these? You're causing bus conflicts between RAM and ROM when trying to read from RAM. Add CPUA15 to the '139's inputs and only enable ROMs when it's high.

Re: 64MBit ExLOROM SRAM Problem

Posted: Wed May 03, 2017 11:00 am
by Ice Man
But isn't that part of the MAD-1 Decoder on the board?
Then again, the 74'139 is not connected to the MAD-1 as connecting it to pin 4 of it results in glitches/crashes.

Will try again later.

Re: 64MBit ExLOROM SRAM Problem

Posted: Wed May 03, 2017 3:13 pm
by lidnariq
You've bypassed the MAD-1 altogether in how you said you wired the ROMs. A bus conflict requires two things being told to drive output at the same time.

So if the '139 you added is enabling one ROM when /ROMSEL (pin 49) is low and A23 is low, and is enabling the other ROM when /ROMSEL is low and A23 is high, then that means the ROM doesn't get out of the way when the MAD-1 enables the RAM (i.e. when SNESA[22,21,20,15]=b'1110').

Re: 64MBit ExLOROM SRAM Problem

Posted: Thu May 04, 2017 1:44 am
by Ice Man
True, I didn't think about that properly.
I might get to try it on the weekend and will report back once I changed it.

Re: 64MBit ExLOROM SRAM Problem

Posted: Wed May 10, 2017 11:16 am
by Ice Man
Sorry for the late response. Haven't had any time yet. Everyone's getting sick here and I have to do everything, lol.
Anyway, I already desoldered the ICs and made something else since it's not worth for just 1-2 games which use 6MB LoROM.

Once I get new MBM29F033C I will try again and report back. Didn't know I ran out. >_<
For now this project is paused.