No, I don't think so. I saw only the following chips:
1 16 megabit (2 Megabyte, 2 Mi x 8b) 5V flash
3 voltage translation ICs, part number unknown, all in 20-pin TSSOPs
1 3V regulator in SOT-23
1 64 megabit (8 Megabyte, 4 Mi x 16b) 3V flash
I didn't realize there was such a thing as ICs for level shifting - I thought that was pretty much done exclusively via diodes/resistors/caps. Also a circuit I've never built...
So you understand the concept of logical OR, right?
If this OR that is true, then the result is true? because either this or that or both could be true?
This is the same idea. A 74'32 emits a signal that is high ("true") when either of its inputs are high ("true").
A 74'00 (NAND = AND followed by NOT) emits a signal that is low when both of its inputs are high ("true").
Thanks for the explanation - obviously I'm familiar with OR and I've seen NAND before though I didn't know offhand how it worked since it's not something that comes up a lot in the software development world (and my programming skills are limited, I mostly write scripts and tools for my office, I'm not a "developer").
lidnariq wrote:You're misreading the picture. The silkscreen labeled "SPC-CE" connects to a via, not pin 79.
Yeah it looked kind of like it was connect to pin 79 but you are indeed correct - I checked it against an unmodified board picture and it's a via going somewhere. I'll take a look when I get home tonight as to where that via actually connects to. I could probably find out now but I'm at work and it's hard enough to find decent quality pics of the even the front of the PCB...
One involves two ROM ("program and expansion" and "data") and for that the table I gave you is the only correct one.
Ok, thanks for clarifying that for me. I was making incorrect assumptions due to my lack of knowledge regarding level shifting ICs. TIL. Knowing how the logic works is a major step here, I can kludge/learn how to build a proper logic circuit.
lidnariq wrote:That is an 8 megabit 'PROM, not an 8 megabyte. You need 40 megabits (or more) of storage to hold the expanded "data" ROM.
Yeah I wasn't paying close attention, sorry for being dense, I do actually know the difference between the two, honest! You are correct, a 5MB rom file would be 40Mbits and thus require an EPROM that was at least 64Mbit.
THAT is going to be much harder to fix. I found a few vague mentions in various places for 5V 64Mbit 4Mb x 16 EPROMs (the M27C642 / M27C640) but I could not find a single listing for one for sale ANYWHERE. I'm guessing they were pretty rare back in their day and there aren't many/any still hanging around these days. Or they never made it to production.
So that leaves me with 2 choices - I can either obtain a 64M 3V EEPROM and build a level shifting circuit, OR I can go the route you previously mentioned of splitting it into 3 ROMs.
Ok so...this is starting to make sense but still doesn't fully fit in my head. I still don't get what the logic circuit is doing, exactly. As best as I can tell, since the Expansion ROM data lives in bank $40, the code is somehow accessing the contents of $40 without lighting up A22. Via the SPC7110? Then, when the game lights up A22 it means that a piece of code is trying to access the data that originally lived at $40 (on a stock ROM), so now it's time to bankswitch the contents of $40 and $50?
In the SPC7110 schematics that I read, it indicated that decompressed data from the SPC7110 originally lived at $50-$5F. I'm not seeing anything in the memory map that indicates that data was remapped somewhere else, or is that irrelevant since a call to $50 would route "normally" and not be translated to whatever ROM banks that would otherwise correspond to $50, since technically that address isn't accessible even in an ExHiROM game and is instead handled via bankswitching between 2 32Mbit chips instead?
Am I understanding this correctly or am I still off target. I'm getting closer, I think once I get the board in front of me and can start referencing back and forth I'll have a better idea of what I'm looking at. Thanks again.