SD Keiji Blader Repro Issues

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Ice Man
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Joined: Fri Jul 04, 2014 2:34 pm

SD Keiji Blader Repro Issues

Post by Ice Man » Wed Jan 22, 2020 2:12 am

Been trying to put the english translation on a Kyuukyoku Harikiri Koushien cart since it's the same PCB type as SD Keiji Blader and according to wiki the Taito X1-017 supports up to 256KB PRG ROM but all official games only have 128KB and the X1-017 is fairly undocumented and I can't find anything about PRG A17 being existant at all. I was tracing all routes myself so far but that didn't help.
If anyone has more information or knows a way, I'll be thankful.

lidnariq
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Location: Seattle

Re: SD Keiji Blader Repro Issues

Post by lidnariq » Wed Jan 22, 2020 11:27 am

Do you have a partial pinout so far?

Ice Man
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Re: SD Keiji Blader Repro Issues

Post by Ice Man » Wed Jan 22, 2020 1:24 pm

I do.

Code: Select all

		X1-017
                 .---\/---.
  (r) PRG A16 <- |01    64| -- VCC
 (fw) CPU A13 -> |02    63| <- M2 (f)
 (frw) PRG A8 -> |03    62| -- NC
 (frw) PRG A7 -> |04    61| -> PRG A13 (r)
 (frw) PRG A9 -> |05    60| -- NC
 (fw) CPU A14 -> |06    59| -> PRG A14 (r)
(frw) PRG A11 -> |07    58| -> PRG A15 (r)
 (frw) PRG A6 -> |08    57| <- PRG A12 (frw)
 (frw) PRG A5 -> |09    56| -- BRIDGED TO PIN 46 (C3+R2 MAYBE VCC IN)
(frw) PRG A10 -> |10    55| -- BRIDGED TO PIN 53
 (frw) PRG A4 -> |11    54| -- NC
 (frw) PRG A3 -> |12    53| -- BRIDGED TO PIN 55
 (frw) PRG D7 <> |13    52| -- VCC
 (frw) PRG A2 -> |14    51| -- GND
 (frw) PRG D6 <> |15    50| -- PAD2 (NC)
 (frw) PRG A1 -> |16    49| -- VBAT
 (frw) PRG D5 <> |17    48| -- RAM VCC
 (frw) PRG A0 -> |18    47| -- GND
 (frw) PRG D4 <> |19    46| -- BRIDGED TO PIN 56 (C3+R2 MAYBE VCC IN)
 (frw) PRG D0 <> |20    45| -- NC
 (frw) PRG D3 <> |21    44| -- NC
 (frw) PRG D1 <> |22    43| -- GND
 (frw) PRG D2 <> |23    42| -> CHR A11 (r)
  (f) CPU R/W -> |24    41| -> CIRAM A10 (f)
 (fr) /ROMSEL -> |25    40| -> CHR A17 (r) 
     (f) /IRQ <- |26    39| <- PPU A10 (f)
          GND -- |27    38| -> CHR A16 (r)
 (fr) PPU /OE -> |28    37| <- PPU A11 (f)
  (r) CHR A15 <- |29    36| -> CHR A10 (r)
  (r) CHR A14 <- |30    35| <- PPU A12 (f)
  (r) CHR A13 <- |31    34| -- NC
  (r) CHR A12 <- |32    33| <- PPU A13 (fr)
                 `--------'
Still missing a few lines but will try to trace more tomorrow.
Last edited by Ice Man on Fri Jan 24, 2020 6:14 am, edited 8 times in total.

lidnariq
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Location: Seattle

Re: SD Keiji Blader Repro Issues

Post by lidnariq » Wed Jan 22, 2020 1:56 pm

Given that the pin orders mostly are in the same order as the ROMs and card edge - projected onto a line, so there's some interleaving - it looks to me like it's pretty likely going to be pin #62. Maybe #60.

Separately ... I have to admit that I'm really curious about what's going with all the NC pins.

Ice Man
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Re: SD Keiji Blader Repro Issues

Post by Ice Man » Wed Jan 22, 2020 2:22 pm

That was my idea too but sadly those pins did not work at all for PRG A17.
I'm sure not all of these pins are NC, I just haven't traced those yet.

FrankWDoom
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Joined: Mon Jan 23, 2012 11:27 pm

Re: SD Keiji Blader Repro Issues

Post by FrankWDoom » Wed Jan 22, 2020 3:53 pm

Have you verified you have all the other pins in the right places? Eg can you run a 128K game from eproms?

Ice Man
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Joined: Fri Jul 04, 2014 2:34 pm

Re: SD Keiji Blader Repro Issues

Post by Ice Man » Thu Jan 23, 2020 1:42 am

Have not tested that yet. But can do that as well later.

Ice Man
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Joined: Fri Jul 04, 2014 2:34 pm

Re: SD Keiji Blader Repro Issues

Post by Ice Man » Thu Jan 23, 2020 3:20 am

Updated the connections to what I'm capable of finding out without desoldering that IC.
Also here's images of the PCB itself.

Looks like CHR ROM is using normal JEDEC pinout while PRG ROM uses Nintendo MaskROM pinout.
Attachments
front.jpg
back.jpg

Ice Man
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Joined: Fri Jul 04, 2014 2:34 pm

Re: SD Keiji Blader Repro Issues

Post by Ice Man » Thu Jan 23, 2020 9:49 am

Tried every single connection. No matter what I do, I just can't get PRG to work or dump properly.

The first 2000 bytes are correct but then it skips to another area.

CHR ROM is 100% correct though. Dumped that, too. Supports up to 256KB.
My guess is , the X1-017 only supports up to 128KB and the translation was made without real hardware in mind.

Also, I'm using this script to dump the cart:

Code: Select all

      case 82: 
        banks = int_pow(2, prgsize) * 2;
        for (int i = 0; i < banks; i += 2) {
          write_prg_byte(0x7EFA, i << 2); // PRG Bank 0 ($8000-$9FFF)
          write_prg_byte(0x7EFB, (i + 1) << 2); // PRG Bank 1 ($A000-$BFFF)
          for (word address = 0x0; address < 0x4000; address += 512) { // 8K Banks ($8000-$BFFF)
            dumpPRG(base, address);
          }
        }
        break;
However, according to wiki PRG Bank 2 is at 0x7EFC. Would I need to adjust the script maybe?

FrankWDoom
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Re: SD Keiji Blader Repro Issues

Post by FrankWDoom » Thu Jan 23, 2020 10:58 am

Are you sure prg is Nintendo mask rom style? Bootgod shows 128k on a dip 32 which suggests standard arrangement.

Ice Man
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Re: SD Keiji Blader Repro Issues

Post by Ice Man » Thu Jan 23, 2020 11:27 am

PRG is not 32 pin. It's 28 Pin on my board and 128KB as well. Therefore I'm pretty sure Nintendo MaskROM.

lidnariq
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Joined: Sun Apr 13, 2008 11:12 am
Location: Seattle

Re: SD Keiji Blader Repro Issues

Post by lidnariq » Thu Jan 23, 2020 11:30 am

Only the J9100231A PCB has a DIP32 PRG ROM. The other two that BootGod has photos of - P3-044B and J9100230A - have DIP28 PRG ROMs.

DIP28 128KB Mask ROMs are not a Nintendo special. They're officially specified by JEDEC. What Nintendo did was order DIP32 mask ROMs that were supersets of the DIP28 128KB JEDEC pinout.

It's bewildering that pins 62 and 60 aren't extra PRG banking bits. They're unused, and they're in the right place...
Ice Man wrote:
Thu Jan 23, 2020 9:49 am
The first 2000 bytes are correct but then it skips to another area.
... That's ... got to be a different problem. Assuming you mean 2000h = 8192 = one bank.
Ice Man wrote:
Thu Jan 23, 2020 9:49 am
However, according to wiki PRG Bank 2 is at 0x7EFC. Would I need to adjust the script maybe?
Most kazzo scripts set up the PRG banking registers to dump 16KB at a time - hence the "(i + 1)" there and only writing to the first two PRG banking registers. Given that this dumping script instead sends things in packets of 512 bytes, however, that doesn't make much sense to me. You could try simplifying things:

Code: Select all

for (int i = 0; i < banks; i += 1) {
  write_prg_byte(0x7EFA, i << 2); // PRG Bank 0 ($8000-$9FFF)
  for (word address = 0x0; address < 0x2000; address += 512) { // 8K Banks ($8000-$9FFF)
    dumpPRG(base, address);
  }
}

Ice Man
Posts: 546
Joined: Fri Jul 04, 2014 2:34 pm

Re: SD Keiji Blader Repro Issues

Post by Ice Man » Thu Jan 23, 2020 12:30 pm

Yea, first 2000 bytes (bank) seems to be correct.

Also, I'm not using kazzo at all. I'm using sanni's cartreader with FC/NES adapter based on Arduino Mega 2560:
https://github.com/sanni/cartreader

All of the scripts inside NES.ino have "address += 512" on them for PRG dumping though.

lidnariq
Posts: 9697
Joined: Sun Apr 13, 2008 11:12 am
Location: Seattle

Re: SD Keiji Blader Repro Issues

Post by lidnariq » Thu Jan 23, 2020 12:34 pm

Do you literally mean 2000 bytes, as in 2*2*2*2*5*5*5 ? Or even 2048 bytes = 0x800. Because if you mean any number smaller than 8192 bytes, it's definitely not a problem with your wiring, or the X1-017.
Last edited by lidnariq on Thu Jan 23, 2020 12:44 pm, edited 2 times in total.

Ice Man
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Joined: Fri Jul 04, 2014 2:34 pm

Re: SD Keiji Blader Repro Issues

Post by Ice Man » Thu Jan 23, 2020 12:42 pm

PRG address x0 to x1FFF is correct = first 8192 bytes of PRG ROM.

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