Help me understand this

[Fisher]

Hello.
I was building a repro of Micromachines on a Quattro Sports board.
At first I thought the mappers were the same, but they aren't. Micromachines is pretty similar to mapper 02, so there I go.
Since I lacked an 74'161 I decided to use something similar.
I had at hand a 74'174, so I decided it should be OK.
It would need some logic activate it on the raising edge, so /ROMSEL and CPU R/W would be low and the output should be high. I decided to try a NOR gate.
Since I wouldn't like to leave bus conflicts happen, I thought to combine /ROMSEL and CPU R/W to enable the Flash, so I used an 74'02 I had.
I also used an 74'32, the same way it's used on a typical mapper02 circuit.
I ended up with this:

So far so good I assembled the thing, but it didn't work.
Long story short: it started working after I generated the CLK signal with an OR gate instead of a NOR.
I just don't understand why. Wouldn't the OR be low when both inputs are low, and don't clock the 74'174 that is activated on the raising edge?
Is it something related to timming?
Can someone please explain?
Thanks in advance.

[lidnariq]

The NES's data bus isn't valid when /ROMSEL falls. It is valid when /ROMSEL rises... so ... OR gate, not NOR gate.

You could also add enough delay until after the data bus is valid. It's around 90ns extra, some of which can be the propagation delay through your NOR gate. viewtopic.php?p=244126#p244126

[Fisher]

Thanks for the explanation.
Looks like I was bitten by one of NES' quirks!