iNes mapper 159 with 512KiB PRG

[lidnariq]

According to 74'138 datasheet it would be Y0 output?

Yes.

The eight latches of the ’HCT373 devices are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the levels that were set up at the D inputs.

Oh, hm. You won't be able to use most transparent latches after all, because the 74'138 emits low when the correct inputs are selected, but the 74'373 holds the current value when its +LATCH input is low.

I'm still uncertain about the other latch inputs/outputs. How do I use them for my application?

Don't need to.

It would let you make a 4MB cart.

[mightydidz]

Should I use a different latch instead?

74HCT374 is an octal positive-edge triggered D-type flip-flop with 3‑state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip‑flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Using Y0 on CP?
What exactly do I connect to Dy and Qy?
Where do PRG-A18 comes into play?

[lidnariq]

[...] 74HCT374 [...]

'374 would be fine, but overkill. That has 8 bits of latch, you only need 1.

Using Y0 on CP?

Yes, because /Y0 will go high when the inputs are no longer correct (e.g. /ROMSEL rising), which is the same time that the various discrete logic mappers capture the data bus.

What exactly do I connect to Dy and Qy? Where do PRG-A18 comes into play?

Think of it as identical to an normal UOROM board. You're just converting a plain UOROM board into one that can play a 512KB game.

[mightydidz]

Isn't a UOROM using quad D latch and quad Or gate to bank PRG up to 256KiB?
https://wiki.nesdev.com/w/index.php/UxROM

The UNROM, UN1ROM, and UOROM boards contain a 74HC161 binary counter used as a quad D latch (4-bit register) and a 74HC32 quad 2-input OR gate to make one bank always visible

Do I also need to have one bank always visible?

'374 would be fine, but overkill. That has 8 bits of latch, you only need 1.

Would something like SN74LVC1G374 would be more reasonable?
https://www.ti.com/lit/ds/symlink/sn74lvc1g374.pdf
Or maybe SN74LVC1G79. Do I need an /OE?
https://www.ti.com/lit/ds/symlink/sn74l ... er.ca%252F

[lidnariq]

Isn't a UOROM using quad D latch and quad OR gate to bank PRG up to 256KiB?

Yes? How do you think it works?

Do I also need to have one bank always visible?

Yes, that's why I compared it to UNROM.

Would something like SN74LVC1G374 would be more reasonable? Or maybe SN74LVC1G79. Do I need an /OE?

Just based on cost and ease of assembly. Both of those are fine. You don't need an /OE pin, although it might let you replace the extra OR gate with a resistor pullup.

[mightydidz]

Here is my schematic.
Is it ok?

[lidnariq]

You forgot to include R/W.

[mightydidz]

oups, your right, i forgot to include it into my schematic.

Lets say I want to remove the or gate and use /oe instead with a pull-up.
You said it "might" work. is there a risk of not working right or glitching?

Here is how i want to try it

[lidnariq]

Pullup needs to be on PRG A18, not on CPU A14. Otherwise I think that looks right.

Krzysiobal has used some carts using this "pullup resistor + output enable", and it's present in this Korean karaoke game.

[mightydidz]

thanks, I'll give it a try soon.