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PostPosted: Fri May 11, 2012 5:05 pm 
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1) It's not wasting lots of space in ROM, all the Rockman ROMs add up to 18M, unless you can find 3M ROMs you can't come up with 15M PRG and 3M CHR...

2 & 3) Data lines? Neither your correction nor his circuit makes any sense. A register alone can't decode the ROM. Hint: /CE = (/selection + PPU_A13)

4) This actually will work.


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PostPosted: Sat May 12, 2012 1:48 am 
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Quote:
wasting lots of space in ROMs

It is because I have to make the games a little uniform. Anyway I can't use any smaller IC than 2*27C080 + 1*27C040, do you have any plan to use smaller IC?

Quote:
no need two data lines for CHR RAM/CE CHR ROM /CE(use Q and /Q of '175 - once at the time you using CHR RAM or CHR ROM)

Excellent suggestion, thank you.

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A register alone can't decode the ROM. Hint: /CE = (/selection + PPU_A13)

Do you mean I can't disable a ROM by using /OE? Considering tepples explanation I feel that using /OE is enough for this case :

Quote:
A chip disabled with /CE high runs in a low-power mode; it takes a while after /CE is pulled low before the chip starts producing data. A chip enabled with /CE low but disabled with /OE high draws nearly full power but can deliver data as soon as /OE goes low.


New :
Image

Rockman 5 --> 256 + 256 --> PRG1 + CHR --> XXXX 0000 --> 00 --> Include Menu
Rockman 3 --> 256 + 256 --> PRG1 + CHR --> XXXX 0010 --> 02
Rockman 1 --> 256 + 8 ----> PRG1 + SRAM -> XXXX 1001 --> 09
Rockman 2 --> 256 + 8 ----> PRG1 + SRAM -> XXXX 1011 --> 0B
Rockman 4 --> 512 + 8 ----> PRG2 + SRAM -> XXXX 11X0 --> 0C
Rockman 6 --> 512 + 8 ----> PRG2 + SRAM -> XXXX 11X1 --> 0D


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PostPosted: Sat May 12, 2012 3:22 am 
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PostPosted: Sat May 12, 2012 7:49 am 
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kyuusaku wrote:
1) It's not wasting lots of space in ROM, all the Rockman ROMs add up to 18M, unless you can find 3M ROMs you can't come up with 15M PRG and 3M CHR...

2 & 3) Data lines? Neither your correction nor his circuit makes any sense. A register alone can't decode the ROM. Hint: /CE = (/selection + PPU_A13)

4) This actually will work.

2 and 3 you can call it "control lines" or whatever, but they transferring data :lol: and i told about using '175 instead of '174 :lol:

P.S. i am in the good mood :lol:


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PostPosted: Sat May 12, 2012 9:30 am 
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I mentioned '175 on page 4. It doesn't make a good choice though because '175 is not a common part, it's not in production anymore, and how it's being used doesn't make any sense. None of the circuit makes any sense so I joined in.


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PostPosted: Sat May 12, 2012 5:17 pm 
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kyuusaku wrote:
I mentioned '175 on page 4. It doesn't make a good choice though because '175 is not a common part, it's not in production anymore, and how it's being used doesn't make any sense. None of the circuit makes any sense so I joined in.


Which one you want? Toshiba? Motorola? TI?


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PostPosted: Sat May 12, 2012 7:49 pm 
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Those parts are available to REQUEST, not offered. And sure you can still buy 74HC, even a few which might be PACKAGED recently (not that I believe ic2ic), seeing how it's the most popular legacy logic family along with 74LS, but that doesn't mean the dies are still being produced (they are separate businesses). I doubt that anyone but NXP actually offer it. 74VHC (mid 90s) seems to be the last logic family for which '175 were produced, and those are definitely discontinued and unavailable. 74HC, which date back to 1982, are only available due to prolonged EOL.

If you look at modern logic families you'd see that '175 aren't being made because it's no longer a desirable part to use along with fast-food integration, and that's my point: it's unsustainable. I guess that hardly matters here considering the small run, and of course the fact that the logic in this thread is nonsensical and random part selection would fail just as well.


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PostPosted: Sat May 12, 2012 11:55 pm 
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I feel that it is not necessary to disable SRAM, is it? But I think I have to use another TTL to disable CHR-ROM when the cartridge needs only CHR-RAM, then again it seems in original logic our Chinese friends used /CE1 (Pin20) of SRAM to control SRAM and left CHR-ROM always enabled! any suggestion?

So far :
Image


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PostPosted: Sun May 13, 2012 12:00 am 
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You can't have two chips on the same bus active (and outputing) at one time regardless of whether one is SRAM or not. The ONLY exception is if you KNOW that both chips hold the same data for the current address. That shouldn't be true for CHR ROM and RAM so the answer is NO you can't do that, you must disable SRAM if you're not using it.

EDIT: My suggestion is stop trying to make sense of the chinese board and copy it. What you think you "know" about it you probably don't. Just design it from the ground up properly. Unquestionably this thing won't work the first time you power it up. If parts of your design are copied from the chinese board and you really don't understand the design fully, and you'll never be able to properly troubleshoot it to fix the problem.


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PostPosted: Sun May 13, 2012 1:48 am 
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Quote:
Just design it from the ground up properly.


Yes, I am trying to design it with new simple logic, but it seems my design will end up using a lot of TTLs! :( Now this time I am worried about start up :

Image


Last edited by FARID on Sun May 13, 2012 4:41 am, edited 2 times in total.

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PostPosted: Sun May 13, 2012 3:40 am 
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kyuusaku wrote:
74VHC (mid 90s) seems to be the last logic family for which '175 were produced, and those are definitely discontinued and unavailable
:lol: sounds like 2A03 still coming out of the fabs :lol:

FARID wrote:
I feel that it is not necessary to disable SRAM, is it? But I think I have to use another TTL to disable CHR-ROM when the cartridge needs only CHR-RAM, then again it seems in original logic our Chinese friends used /CE1 (Pin20) of SRAM to control SRAM and left CHR-ROM always enabled! any suggestion?

2 FARID
'175 have Q and /Q, so you need just one bit to control CHR ROM/RAM without extra invertors.

And could you please use another image hosting

2 infiniteneslives it's very simple design. Very simple. And MotZilla gave more than enough information to build it.


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PostPosted: Sun May 13, 2012 7:40 am 
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Quote:
'175 have Q and /Q, so you need just one bit to control CHR ROM/RAM without extra invertors.


No, it seems CHR side is different than PRG side. Originally /OE and /CE of CHR-ROM and CHR-RAM have their own lines :
/OE --> CON17 --> CHR /RD
/CE --> CON56 --> CHR /A13

I don't think it is possible to hijack those lines and control them. Anyway I used 157 to solve this issue.


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PostPosted: Sun May 13, 2012 7:43 am 
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Location: NE Indiana, USA (NTSC)
A mux like that will work if data is to flow only one way. But data flows two ways when there's CHR RAM. If you want to see how to hijack chip enable signals to make CHR ROM and CHR RAM work on the same board, take a few hints from the TQROM board (Pinbot and High Speed).


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PostPosted: Sun May 13, 2012 7:45 am 
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When people ask me why I made my circuit a certain way, I tell them that I made the circuit only after I opened my parts drawer and had a look what I had inside. Basically the beauty of TTL chips iis the fact that you can do anything with any combinations of parts you have.

So by logic and reasoning, I would listen to what kyuusaku is trying to say ... :)

Obviously the Chinese circuit is based on what they had lying around.


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PostPosted: Sun May 13, 2012 11:30 am 
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80sFREAK wrote:
2 infiniteneslives it's very simple design. Very simple. And MotZilla gave more than enough information to build it.


Well there sure seems to be a LOT of confusion and poor designs stemming from a very, very simple design...


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