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IRQ disable ($E000-$FFFE, even)
7 bit 0
---- ----
xxxx xxxx
Writing any value to this register will disable MMC3 interrupts AND acknowledge any pending interrupts.
Thanks
Moderator: Moderators
Code: Select all
IRQ disable ($E000-$FFFE, even)
7 bit 0
---- ----
xxxx xxxx
Writing any value to this register will disable MMC3 interrupts AND acknowledge any pending interrupts.
To clarify, the IRQ signal is level-sensitive (compared to NMI, which is edge-triggered) - once the timer expires, the IRQ signal is activated, and the CPU will jump to the IRQ handler at every possible opportunity (i.e. whenever the "I" flag is clear). To prevent the CPU from getting stuck in a loop rerunning the IRQ handler over and over, it needs to tell the hardware that generated the interrupt that it's done handling it and that it can deactivate the signal, and for the MMC3 this involves writing any value to $E000.Dwedit wrote:Acknowledge means that it TURNS OFF the IRQ pin. Otherwise it would keep triggering interrupts over and over again.