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PostPosted: Wed Oct 14, 2015 1:51 pm 
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I think "PPU runs prior to CPU" is a rather ambiguous statement.

What I think this is getting at is that you get a subtly different timing result if CPU writes begin to affect the PPU on the following clock, or on the same clock.

The truth of it is that CPU instructions take multiple clocks, and different things happen on each clock of the instruction. I believe writes usually happen on the last clock of an instruction (don't take my word for this, look it up), but there are some exceptions.


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PostPosted: Wed Oct 14, 2015 4:25 pm 
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rainwarrior wrote:
I think "PPU runs prior to CPU" is a rather ambiguous statement.

Not in terms of emulation. Like run_cpu() then run_ppu() 3 times (NTSC). Look back. :wink:
Quote:
What I think this is getting at is that you get a subtly different timing result if CPU writes begin to affect the PPU on the following clock, or on the same clock.

Exactly!
Quote:
The truth of it is that CPU instructions take multiple clocks, and different things happen on each clock of the instruction. I believe writes usually happen on the last clock of an instruction (don't take my word for this, look it up), but there are some exceptions.

Yup. 8-)


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PostPosted: Thu Oct 15, 2015 6:56 am 
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I was looking online at examples of what other emulator authors did to create their cycles and I think I've found a method that compromises between rainwarrior's catch-up method and the CPU/PPU/PPU/PPU loop method.

The CPU step method returns the number of cycles an instruction takes, and then the main loop runs the PPU for 3*cpuCycles cycles.

Thoughts?

Code:
//Modified from Go to C++
int cpuCycles = CPU.Step()
int ppuCycles = cpuCycles * 3
for(i := 0; i < ppuCycles; i++) {
   PPU.Step()
}

Source: https://github.com/fogleman/nes/

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Current ALIAneS Emulator Progress: CPU complete, PPU indev - we have graphics and sprites!


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PostPosted: Thu Oct 15, 2015 7:52 am 
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Nintendulator's CPU executes each instruction as a sequence of microintructions. Each microinstruction takes 1 CPU cycle. And, every microinstruction triggers a main memory read or write. Within the read and write routines, the PPU is advanced. For NTSC, it is advanced by 3 PPU cycles. For PAL, it is normally advanced by 3 PPU cycles and by 4 PPU cycles every 5 advances, producing an average rate of 3.2 PPU cycles per CPU cycle.

The CPU and PPU will always be slightly out of sync. Nintendulator compensates by slightly adjusting the PPU rendering timings.


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