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 Post subject: CPU timing precision
PostPosted: Fri Dec 11, 2015 2:52 pm 
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aLaix wrote:
Now the thing is that if i use 2 ticks of delay Bart vs space mutants shakes the status bar, but battletoads passes second level.
If i use 3 ticks of delay bart wont shake, but battletoads will hang.
both values passes all blargg tests.


Welcome to timing hell. Describe your CPU design and how the PPU is kept in sync with the CPU.


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PostPosted: Fri Dec 11, 2015 3:44 pm 
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zeroone wrote:
aLaix wrote:
Now the thing is that if i use 2 ticks of delay Bart vs space mutants shakes the status bar, but battletoads passes second level.
If i use 3 ticks of delay bart wont shake, but battletoads will hang.
both values passes all blargg tests.


Welcome to timing hell. Describe your CPU design and how the PPU is kept in sync with the CPU.


Hi guys, sorry to jump in...

Our CPU is designed to be cycle accurate. It operates the following way:

- It has a "Run" method that is called from main. It runs the amount of cycles worth 1 "frame" at NTSC clock speed (No PAL support yet), any cycles remaining are returned and run in the next frame.
- It emulates page crosses and dummy reads/writes. Matches Nintendulator logs for nestest.nes and passes all Blargg instruction tests.
- Every CPU cycle is either a read or a write cycle, calling its appropriate handler every time, as described in this doc: http://nesdev.com/6502_cpu.txt.
- Inside the CPU read / write handlers, the PPU runs for 3 cycles (3 dots). PPU runs first, then CPU read / write is handled. This is: 3 PPU cycles, then 1 CPU cycle.
- Interrupts are polled after the second-last cycle of every instruction, except for branches, which poll interrupts as described in the wiki page. - It passes "CLI latency" test.
- On sprite DMA's, cpu is suspended by 513 or 514 cycles, but PPU continues running 3 cycles for each CPU cycle.
- We fail "NMI on timing" test by one cycle. Every other PPU timing test passes.

Thank in advance for you valuable help!

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Last edited by Fumarumota on Fri Dec 11, 2015 7:34 pm, edited 1 time in total.

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PostPosted: Fri Dec 11, 2015 4:11 pm 
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Are you skipping the pre-render PPU cycle on odd frames?


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PostPosted: Sat Dec 12, 2015 1:53 pm 
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Yes, and the ppu passes the odd/even tests.

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PostPosted: Sun Dec 13, 2015 6:14 am 
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Quote:
- It has a "Run" method that is called from main. It runs the amount of cycles worth 1 "frame" at NTSC clock speed (No PAL support yet), any cycles remaining are returned and run in the next frame.

My emu (RockNES) runs for 1 full instruction instead of a "frame".
Quote:
- It emulates page crosses and dummy reads/writes. Matches Nintendulator logs for nestest.nes and passes all Blargg instruction tests.
- Every CPU cycle is either a read or a write cycle, calling its appropriate handler every time, as described in this doc: http://nesdev.com/6502_cpu.txt.
- Inside the CPU read / write handlers, the PPU runs for 3 cycles (3 dots). PPU runs first, then CPU read / write is handled. This is: 3 PPU cycles, then 1 CPU cycle.
- Interrupts are polled after the second-last cycle of every instruction, except for branches, which poll interrupts as described in the wiki page. - It passes "CLI latency" test.

Pretty much like I do! Polling interrupts after the second-last cycle doesn't matter AFAIK.

Quote:
- On sprite DMA's, cpu is suspended by 513 or 514 cycles, but PPU continues running 3 cycles for each CPU cycle.

It's not that easy. You have the DMC triggering IRQs/fetching a sample during a sprite DMA, plus IRQ/NMI triggering on sprite DMA too.
Quote:
- We fail "NMI on timing" test by one cycle. Every other PPU timing test passes.

I believe this can be fixed by ignoring NMIs ($2000 write) at PPU cycle 341 (or zero, depends of your counting).


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PostPosted: Mon Dec 14, 2015 3:01 pm 
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Hello guys, thank you for all the support so far!
we were checking battletoads and it does hangs sporadically using whatever delay value. So we will spend some time to debug it. (in fact, program the save state module, make the debugger capable to debug this, and check everything, cpu and ppu) :wink:
We will let you know the discoveries from this. :D

@Zepper
Quote:
My emu (RockNES) runs for 1 full instruction instead of a "frame".

We run a "frame" because we run all the instructions necessary for a frame (including the corresponding ppu cycles) and then we check how much time it spent, then we sleep the remaining time in order to wait for the next frame.

Quote:
It's not that easy. You have the DMC triggering IRQs/fetching a sample during a sprite DMA, plus IRQ/NMI triggering on sprite DMA too.

When we run a cpu cycle or a ppu cycle we are taking in consideration their corresponding IRQ/NMI polling/triggering.

Quote:
I believe this can be fixed by ignoring NMIs ($2000 write) at PPU cycle 341 (or zero, depends of your counting).

Is this a hack? or a NES behaviour? :shock:

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PostPosted: Mon Dec 14, 2015 5:42 pm 
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No hack. It's been a long time since I fixed it. See test ROM "supression.s", if I'm not mistaken.
Code:
; Tests behavior when $2002 is read near time
; VBL flag is set.
;
; Reads $2002 one PPU clock later each time.
; Prints whether VBL flag read back as set, and
; whether NMI occurred.
;
; 00 - N
; 01 - N
; 02 - N
; 03 - N        ; normal behavior
; 04 - -        ; flag never set, no NMI
; 05 V -        ; flag read back as set, but no NMI
; 06 V -
; 07 V N        ; normal behavior
; 08 V N
; 09 V N


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PostPosted: Mon Dec 14, 2015 9:24 pm 
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@Zepper

Does RockNES ever hang on Battletoads stage 2?


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PostPosted: Tue Dec 15, 2015 9:20 am 
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Yes. :oops: :cry:


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PostPosted: Tue Dec 15, 2015 2:01 pm 
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See the bottom of this thread.

The most recent Nintendulator beta (as of the time of that thread) has the same issue with Bart vs the Space Mutants and Battletoads stage 2. However, the latest official release of Nintendulator works properly. The PPU timing in the beta version closely mimics the timing tables in the wikis, yet it has the aforementioned issues. On the other hand, the official release fudges the timing slightly and the games work as a consequence.

Since we do not have access to CPU timing tables more granular than microcodes, the CPU must be advanced by an entire CPU cycle at a time. This means that the CPU and PPU will always be out of sync by 3 PPU cycles for NTSC and up to 4 PPU cycles for PAL. The PPU timings in the official release of Nintendulator appear to be shifted by 4 PPU cycles to compensate. It's a hack, but it maybe a necessary one.


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PostPosted: Tue Dec 15, 2015 3:19 pm 
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zeroone wrote:
Since we do not have access to CPU timing tables more granular than microcodes, the CPU must be advanced by an entire CPU cycle at a time.
... We don't?

I thought that the Visual{6502/2A03/2C02} tools let us break everything down into what's happening on a master clock by master clock basis... Or at least 6502 φ2 high/low half clocks.


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PostPosted: Tue Dec 15, 2015 6:52 pm 
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lidnariq wrote:
... We don't?

I thought that the Visual{6502/2A03/2C02} tools let us break everything down into what's happening on a master clock by master clock basis... Or at least 6502 φ2 high/low half clocks.


Sub-microcode steps could be obtained from a transistor level simulation of the 2A03. But, no one has done the legwork yet, producing a document analogous to this one. Lists with 3x the number of steps would work for NTSC. For PAL, it could still occasionally executed 2 PPU cycles for one sub-microcode step of the CPU to maintain the proper timing ratio.

Until this is demonstrated, who knows if it would even solve the problems. The CPU and PPU would still be out of sync by 1 PPU cycle for NTSC and up to 2 PPU cycles for PAL. Can a transistor level simulation of the 2A03 run in real-time yet? Maybe that's the ultimate way to go.


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PostPosted: Wed Dec 16, 2015 9:48 am 
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I don't know in software meanings, but in an easy manner, are you talking about "finetunning" the CPU/PPU time sync?


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PostPosted: Wed Dec 16, 2015 11:25 am 
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Zepper wrote:
I don't know in software meanings, but in an easy manner, are you talking about "finetunning" the CPU/PPU time sync?


Does RockNES advance the CPU by 1 microcode at a time or by 1 full instruction at a time?


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PostPosted: Wed Dec 16, 2015 10:03 pm 
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@Zepper
Sorry for the misunderstanding, we pass suppression test, what we are not passing is 07-NMI_on_timing test.


Wow! I wasn't expecting this! :shock: Very interesting...
What about Nestopia?? I tested both bart and battletoads and both does works as expected.

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