Transistor level emulation

Discuss emulation of the Nintendo Entertainment System and Famicom.

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zeroone
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Transistor level emulation

Post by zeroone » Wed Dec 23, 2015 1:42 pm

Does Visual6502 simulate any of the analog characteristics of the circuit elements? Or, it is an idealized switching level simulation (i.e. the transistors act like perfect relay switches that are opened or closed)?

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Re: Transistor level emulation

Post by lidnariq » Wed Dec 23, 2015 2:26 pm

No, it does not implement analog or asynchronous behavior. (Visual6502 is not SPICE, nor is it clear that emulating the entire chip in that manner is useful, as opposed to identifying a situation where that would be useful and simulating that subset. e.g. visual6502wiki:6502 Opcode 8B)

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Re: Transistor level emulation

Post by zeroone » Wed Dec 23, 2015 2:46 pm

lidnariq wrote:No, it does not implement analog or asynchronous behavior. (Visual6502 is not SPICE,
Thanks.

How many transistors are in the CPU and PPU combined? Graph traversal (a flood-fill) for voltage propagation runs at O(n). Shouldn't we be able to run a switch-level simulation at real-time speed by just looping between voltage propagation and flipping switches?
lidnariq wrote:nor is it clear that emulating the entire chip in that manner is useful, as opposed to identifying a situation where that would be useful and simulating that subset. e.g. visual6502wiki:6502 Opcode 8B)
The simulation is incomplete?

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Re: Transistor level emulation

Post by lidnariq » Wed Dec 23, 2015 3:33 pm

zeroone wrote:How many transistors are in the CPU and PPU combined?
6502 is about 3500. 2A03 is about 10000. 2C02 is about 16000.

For each simulator, look at transdefs.js
zeroone wrote:The simulation is incomplete?
So? It also doesn't simulate individual electrons or the effects of gamma rays or defects from nuclear radiation.

The objective was never finding out what goes wrong when you undervolt or overclock a 6502, but rather to find out what behaviors are going on when it's operating as designed. The entire point of digital design is that you can make these assumptions and get a working object. The extra bits of the 2A03 and 2C02 are also almost entirely compliant too, with the exception of the OAM DRAM and the video DAC.

Anyway, it's almost impossible to accurately simulate the analog or dynamic behavior of something when it's removed from its context. If you're chasing down analog coupling between the PPU's video signal and XAA behavior, it's extremely unlikely that anything you find can be extrapolated to anything else—not even another NES mainboard.

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Re: Transistor level emulation

Post by Myask » Wed Dec 23, 2015 4:35 pm

lidnariq wrote:No, it does not implement analog or asynchronous behavior. (Visual6502 is not SPICE, nor is it clear that emulating the entire chip in that manner is useful, as opposed to identifying a situation where that would be useful and simulating that subset. e.g. visual6502wiki:6502 Opcode 8B)
How does the 2A03 not having the BCD hooked up affect 8B:XAA? Do we know?

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Re: Transistor level emulation

Post by zeroone » Wed Dec 23, 2015 4:40 pm

lidnariq wrote:So? It also doesn't simulate individual electrons or the effects of gamma rays or defects from nuclear radiation.

The objective was never finding out what goes wrong when you undervolt or overclock a 6502, but rather to find out what behaviors are going on when it's operating as designed. The entire point of digital design is that you can make these assumptions and get a working object. The extra bits of the 2A03 and 2C02 are also almost entirely compliant too, with the exception of the OAM DRAM and the video DAC.

Anyway, it's almost impossible to accurately simulate the analog or dynamic behavior of something when it's removed from its context. If you're chasing down analog coupling between the PPU's video signal and XAA behavior, it's extremely unlikely that anything you find can be extrapolated to anything else—not even another NES mainboard.
That's not what I meant. You said:
lidnariq wrote:nor is it clear that emulating the entire chip in that manner is useful
If the simulation were capable of running at real-time speeds, why wouldn't that be useful for an emulator?

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Re: Transistor level emulation

Post by Dwedit » Wed Dec 23, 2015 7:32 pm

Because you get a space heater in addition to an emulated NES, whereas with a far simpler emulator, you don't heat up a house.
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Re: Transistor level emulation

Post by lidnariq » Wed Dec 23, 2015 8:06 pm

Myask wrote:How does the 2A03 not having the BCD hooked up affect 8B:XAA? Do we know?
It doesn't: in the 2A03 the BCD mode was disabled by removing a single connection so that the adjustment logic believes the D flag is always clear.

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Re: Transistor level emulation

Post by zeroone » Wed Dec 23, 2015 9:52 pm

Dwedit wrote:Because you get a space heater in addition to an emulated NES, whereas with a far simpler emulator, you don't heat up a house.
The primary motivators are accuracy and simplicity. If a switch-level transistor model can be made to run in real-time, then building an emulator would just involve dealing with the chip pins. In principle it should be possible to run efficiency because the algorithm is parallelizable. It can take advantage of multiple cores. Maybe it can even run on the GPU. Why hasn't this been attempted yet?

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Re: Transistor level emulation

Post by 3gengames » Wed Dec 23, 2015 10:12 pm

Because it's not needed for accurate emulation. Period.

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Re: Transistor level emulation

Post by rainwarrior » Wed Dec 23, 2015 10:38 pm

zeroone wrote:Why hasn't this been attempted yet?
Doesn't Visual 6502 already take like 30 minutes per frame? What more reason do you need?

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Re: Transistor level emulation

Post by Drag » Thu Dec 24, 2015 3:11 am

zeroone wrote:The primary motivators are accuracy and simplicity. If a switch-level transistor model can be made to run in real-time, then building an emulator would just involve dealing with the chip pins. In principle it should be possible to run efficiency because the algorithm is parallelizable. It can take advantage of multiple cores. Maybe it can even run on the GPU. Why hasn't this been attempted yet?
Transistor-level emulation is extremely low-level emulation, and is more useful for engineers when it's time to physically open an NES up and poke at it to figure out some specific ill-understood behavior. However, as we better understand the way the NES works, we can directly simulate the results and completely skip all of the internal bit-flipping, which is what allows emulators to run in real time and not consume 100% of the CPU and GPU's cores. That's why this hasn't been attempted yet.

If this were a pet project just to see if something like this could be made possible, then sure, try it out. It would prove to be a pretty big challenge though.

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Re: Transistor level emulation

Post by Zepper » Thu Dec 24, 2015 5:34 am

Mother of God... :shock:

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Re: Transistor level emulation

Post by zeroone » Thu Dec 24, 2015 8:31 am

rainwarrior wrote:Doesn't Visual 6502 already take like 30 minutes per frame? What more reason do you need?
Ouch. I'll still try to investigate further, but that doesn't sound hopeful.

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Re: Transistor level emulation

Post by provably » Thu Dec 31, 2015 2:53 am

To have a truly accurate emulator, we need to formally prove its correctness in respect to Visual2A03/2C02.

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