Actually, palette RAM is overlaid on top of actual VRAM, so you could argue that the viewer in Mesen shows the contents of the memory chip rather than what you'd get if you hypothetically read that address via the PPU registers. There are normally only NT mirrors at $3F00-$3FFF, but there could be unique RAM there too, and it can be read with some mild trickery (source). I'm not sure how you could write data there though, without bankswitching.rainwarrior wrote:Why is that a reason not to show the palette memory at the address that you would read or write it? It's still what you'd find at that PPU address.
To me it makes more sense to show the underlying memory than the overlaid palette RAM, because AFAIK they're are no other means to see that data (if it's unique instead of mirrored), while palette RAM has its own dedicated viewer.
Sure it may be one of those "who's ever gonna need this?" cases, but the fact is that deliberately hiding something and making it inaccessible just because most people have no use for it is a bad design choice. Palette RAM is *NOT* part of VRAM and I feel like it's important to show it's treated differently (it's even read differently).