DMA 'on write cycle'

Discuss emulation of the Nintendo Entertainment System and Famicom.

Moderator: Moderators

User avatar
Disch
Posts: 1848
Joined: Wed Nov 10, 2004 6:47 pm

Re: DMA 'on write cycle'

Post by Disch »

Zepper wrote:I mean... in easy words... you write a test rom... and someone would run it in a NES.
I'm not really testing stuff as much as I'm trying to observe behavior.
I don't know a thing about the accuracy level when using a PowerPak-like device, instead of a SMB-for-tests cartridge set.
PowerPak is no good for testing anything mapper related -- or anything cartridge side (since it is also just an emulator) -- nor is it good for testing power-on state (since the PowerPak has to run its own code before it passes control to your ROM)

But for testing any other core NES functionality, it should be fine.
Feuerwerk42
Posts: 17
Joined: Fri Mar 18, 2016 3:59 am

Re: DMA 'on write cycle'

Post by Feuerwerk42 »

Hi Disch

If the DMA-unit works like you assumed this behavior can cause errors.
Lets say the CPU executes the Opcode "LDA $2002" and the DMA gets active
in that moment the CPU requests the PPU for $2002. With the "next cpu tick"
the PPU returns PPUSTATUS with a set Vblank-Bit and clears Vblank internally.
In this next tick the CPU gets holded, the DMA takes control over the addr/data
bus and requests a byte of audio stream which will be available with the next cpu
tick. With this third tick the request to $2002 have to be repeated, cause the
previously requested byte got lost. But now the PPU returns a PPUSTATUS
without VBlank set which can result in faulty behavior of the software.

Chris
User avatar
cpow
NESICIDE developer
Posts: 1097
Joined: Mon Oct 13, 2008 7:55 pm
Location: Minneapolis, MN
Contact:

Re: DMA 'on write cycle'

Post by cpow »

Feuerwerk42
Posts: 17
Joined: Fri Mar 18, 2016 3:59 am

Re: DMA 'on write cycle'

Post by Feuerwerk42 »

Sorry, missed that thread. But very interesting.
Forget everything i wrote before. It includes my considerations completely.
Post Reply