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When does $2006 update the PPU A lines?
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Author:  Disch [ Tue Sep 06, 2016 12:59 pm ]
Post subject:  When does $2006 update the PPU A lines?

This might be a confusing question to answer, because it's also a confusing question to ask.

We all know that you can toggle PPU A12 (and thus manually clock the MMC3 IRQ counter) with repeated writes to $2006. My question is basically "why?". Specifically... why does the NES put the address on the bus after the 2nd $2006 write? There's no memory access taking place, is there?

And what happens during rendering when memory accesses (those UNRELATED to the current PPU address, mind you) are taking place? Does the address still get pushed on the bus and conflict with the address currently being read from?

Author:  Zepper [ Tue Sep 06, 2016 2:43 pm ]
Post subject:  Re: When does $2006 update the PPU A lines?

Disch wrote:
Specifically... why does the NES put the address on the bus after the 2nd $2006 write? There's no memory access taking place, is there?

Isn't that something that belongs to the loopy's ppu scrolling logic?

Author:  Disch [ Tue Sep 06, 2016 3:20 pm ]
Post subject:  Re: When does $2006 update the PPU A lines?

Loopy's doc talks about updating the PPU address. That's no problem. But it doesn't make any mention as to what is put on the bus and when.

The PPU would need to update the bus for the below things:
1) Rendering fetches (NT/CHR/Attribute)
2) $2007 writes
3) Refilling the read buffer after $2007 reads

For #2 and #3, LoopyV (ie: the PPU address) is put directly on the bus. But for #1 (specifically the attribute reads), LoopyV and the PPU bus hold two very different values. So they must be two different things internally.

So why do $2006 writes touch the bus? Not only do they not need to, it seems like it would be problematic. But they must, because it can be observed through the MMC3 IRQ counter.

Author:  tepples [ Tue Sep 06, 2016 5:09 pm ]
Post subject:  Re: When does $2006 update the PPU A lines?

If the bus isn't 3-state, the PPU has to output something on the address bus at all times. A rule "whenever rendering is disabled, put v on the bus" probably takes fewer gates than "when rendering is disabled, hold the last value that happened to be on the bus".

Author:  Bregalad [ Tue Sep 06, 2016 11:05 pm ]
Post subject:  Re: When does $2006 update the PPU A lines?

Quote:
And what happens during rendering when memory accesses (those UNRELATED to the current PPU address, mind you) are taking place?

They are very related. The "current PPU address" is the NT tile which is being rendered, and on attribute table and pattern table fetch, the adress is replaced by something else, I guess with an internal multiplexer.

Author:  Disch [ Tue Sep 06, 2016 11:47 pm ]
Post subject:  Re: When does $2006 update the PPU A lines?

I know these things, Bregalad... and I think you know what I meant. But hey, if you want to get into a technicality war.... I'm game... ;P

Bregalad wrote:
They are very related. The "current PPU address" is the NT tile which is being rendered


Not entirely. Only the low 10 bits. A10 and A11 are in fact completely unrelated to LoopyV, as they are forced to %10 for NT reads.

Quote:
and on attribute table and pattern table fetch, the adress is replaced by something else, I guess with an internal multiplexer.


For attributes, the address could be derived from LoopyV, so in that sense I suppose it is related (except for A10 and A11 as above).

CHR fetches, however, use only 3 bits from LoopyV, making them the least related of all.



So I suppose those fetches are "partially related" to LoopyV. :D



EDIT:

Also tepples, your answer makes sense, I guess. :) Thanks.

Author:  Bregalad [ Wed Sep 07, 2016 2:50 am ]
Post subject:  Re: When does $2006 update the PPU A lines?

Quote:
CHR fetches, however, use only 3 bits from LoopyV, making them the least related of all.

So I suppose those fetches are "partially related" to LoopyV. :D

No, the 3 bits are from the fine scrolling, and are not part of the current adress, which only increase by 32 once the fine scrolling reach 7. Anyhow, how the PPU internally drive it's adress lines is still some black magic, I guess.

Author:  Quietust [ Wed Sep 07, 2016 4:41 am ]
Post subject:  Re: When does $2006 update the PPU A lines?

Taking a brief look at Visual 2C02, A0-A13 are not tristated and output the contents of the V register whenever rendering is disabled.

Author:  Disch [ Wed Sep 07, 2016 7:54 am ]
Post subject:  Re: When does $2006 update the PPU A lines?

@Bregalad:

Fine Y scrolling is absolutely part of the address, as can be evidenced by the first $2006 write's impact on it (forces high bits to zero and changes the low bit). Also, doing a $2007 write when the PPU address is $2FFF will increment the fine Y scroll.


@Quietust:

Cool, so tepples was right. That makes sense. Thanks. I assume that happens during VBlank as well.

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