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Streemerz Audio Emulation Problems
http://forums.nesdev.com/viewtopic.php?f=3&t=15103
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Author:  isosceles [ Sat Nov 12, 2016 2:08 am ]
Post subject:  Streemerz Audio Emulation Problems

Streemerz apparently relies on some tricky APU emulation, as it claims "Sound problems may occur on old/inaccurate emulators, avoid them if you can."

https://www.fauxgame.com/

On the title screen I hear some intermittent loud high-pitched screeching, so I'm wandering what sort of trickery is required for this game.

Another post mentions "...it tests the ability for the sweep unit to change the high bytes of the period."

viewtopic.php?f=3&t=10059&hilit=tricky+sound#p111583

What exactly is meant by that?

Author:  rainwarrior [ Sat Nov 12, 2016 2:23 am ]
Post subject:  Re: Streemerz Audio Emulation Problems

Wiki: APU wrote:
Writing $4017 with bit 7 set will immediately clock all of its controlled units at the beginning of the 5-step sequence.

The sweep unit is used to change the frequency in a deliberate way by forcing it to clock immediately.

More info here: http://forums.nesdev.com/viewtopic.php?f=2&t=231

The other thing that Streemerz relies upon is illegal opcodes. If you don't emulate those properly (or at least the one it uses... SAX maybe?), it will fail.

Author:  Dwedit [ Sat Nov 12, 2016 9:39 am ]
Post subject:  Re: Streemerz Audio Emulation Problems

The illegal opcodes mess with the music far more than the sweep trick.

Author:  isosceles [ Sat Nov 12, 2016 3:08 pm ]
Post subject:  Re: Streemerz Audio Emulation Problems

OK problem solved! In my case there was no issue with the illegal instructions or clocking the sweep registers etc.

I was setting the pulse channel's timer period incorrectly when writing to $4002/$4006 and $4003/$4007. I had thought that the period should be set based on the current value of both sets of registers after the write, but that's apparently not the case, since the sweep could be modifying that period. The only bits of the timer period that are affected are those that correspond to the register written to. So for example, if writing to $4002 the low 8 bits of the pulse channel's timer period are updated, but the upper 3 bits are not affected, even if those bits are different than the corresponding bits in $4003.

That was not intuitively the case, at least for me.

Anyway problem solved, the link to the other forum post was very helpful, thanks again!

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