I tried reading 0x2002 around the time when the nmi flag gets set (241.001). Below is the "read from address" cycle of LDA 0x2002... wasn't sure how to present the results, but maybe you guys'll understand.
Code:
phi1 phi2
v v
B 0123456789AB0123456789AB = 2002.7 set, nmi occurs (A.7 clear)
^ ^ ^ ^
338 339 340 0
phi1 phi2
v v
B 0123456789AB0123456789AB = 2002.7 set, nmi occurs (A.7 clear)
^ ^ ^ ^
339 340 0 1
phi1 phi2
v v
B 0123456789AB0123456789AB = 2002.7 never set, nmi doesn't occur (A.7 clear)
^ ^ ^ ^
340 0 1 2
phi1 phi2
v v
B 0123456789AB0123456789AB = 2002.7 set, nmi doesn't occur (A.7 set)
^ ^ ^ ^
0 1 2 3
phi1 phi2
v v
B 0123456789AB0123456789AB = 2002.7 set, nmi occurs (A.7 set)
^ ^ ^ ^
1 2 3 4
I had expected the last case to also block the nmi, that's what the wiki says I think. Unsure how much clock alignment does here, but that can't be changed in visual nes as far as i know.
Edit:
Brief test of sprite overflow clearing (261.001):
Code:
phi1 phi2
v v
B 0123456789AB0123456789AB = 2002.5 cleared (A.5 clear)
^ ^ ^ ^
339 340 0 1
With dot 1 barely in on this cycle, it still manages to clear sprite overflow and return a 0 in bit 5. That should mean that if dot 1 is where 340 or 0 is in that diagram, overflow will also be seen as cleared. Haven't tested any other timing, though.