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How long does the NMI line remains low after being asserted?
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Author:  Fumarumota [ Tue Jun 27, 2017 10:02 pm ]
Post subject:  How long does the NMI line remains low after being asserted?

Hi NesDev, here I am bothering you again with some silly question that has been running through my head for a while now. I'm pretty sure you guys can shed some light on this.

At the start of VBLANK, the PPU asserts the NMI line, provided NMI interrupts are enabled in the 2000 reg's bit 7. But when does the PPU releases the line (at the end of VBLANK, maybe)?

In other words, how long does the NMI line remains low after being asserted?

Thank you very much in advance.

Author:  thefox [ Wed Jun 28, 2017 3:18 am ]
Post subject:  Re: How long does the NMI line remains low after being asser

The wiki's timing diagram has the answer: http://wiki.nesdev.com/w/images/d/d1/Ntsc_timing.png. (Look for "Set VBlank flag" and "Clear: VBlank, ...".)

Additionally, the top bit of PPU register $2000 affects how long NMI is asserted. You can think of the CPU's NMI input as "AND" between PPU's "in VBlank" flag and bit 7 of $2000. ("NAND" if you want to think of the NMI line as active low.)

Author:  tepples [ Wed Jun 28, 2017 6:11 am ]
Post subject:  Re: How long does the NMI line remains low after being asser

/NMI = NMI_occured NAND NMI_enabled

  • NMI_enabled is bit 7 of the value last written to $2000.
  • NMI_occurred becomes true at the start of line 241 (291 on Dendy). It can be read as bit 7 of $2002, and it becomes false when $2002 is read or at the start of the pre-render line (261 on NTSC/RGB or 311 on PAL), whichever comes first.
  • A press of the Reset button does not clear NMI_occurred. It clears NMI_enabled only on the front-loading NES, not Famicom, Dendy, or top-loading NES.

Author:  rainwarrior [ Wed Jun 28, 2017 8:19 am ]
Post subject:  Re: How long does the NMI line remains low after being asser

May also be worth pointing out that the NMI interrupt is edge triggered, unlike the IRQ interrupt, so even if it asserts for a longer period it won't keep re-entering the NMI like it would for an IRQ.

So, you can clear it early by reading $2002 but it doesn't need to be "acknowledged".

Author:  Fumarumota [ Wed Jun 28, 2017 9:12 am ]
Post subject:  Re: How long does the NMI line remains low after being asser

Awesome!

It's clearer than water for me now. Thank you :) !

Author:  tokumaru [ Wed Jun 28, 2017 11:00 am ]
Post subject:  Re: How long does the NMI line remains low after being asser

rainwarrior wrote:
So, you can clear it early by reading $2002 but it doesn't need to be "acknowledged".

I for example never acknowledge NMIs. Every cycle of vblank time counts when doing dynamic VRAM updates! :mrgreen:

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