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PostPosted: Fri Jun 30, 2017 1:45 am 
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Joined: Wed May 04, 2016 12:43 am
Posts: 8
When looking at the Ntsc_timing.png diagram it clearly states that the vblank flag is set at [241, 1].
However, when looking at sourcecode for several emulators many of those enables the vblank flag on [241, 0].
Some emulators also delays the NMI one PPU cycle after setting the vblank flag.

Are most emulators just brute-forcing these numbers in order to pass blargg's ppu test roms, since they
are not actually running the CPU and PPU in paralell so they will just try to tweak it until it passes, or
are there other more scientific reasons for this?

- Is it correct that the vblank flag is enabled on [241, 1] or is the diagram wrong?
- Is the /NMI pin pullled low on [241, 1] as well or is it delayed?

I've broken my CPU emulator core into cycles now so that I can single-step individual cycles inside each instruction which I think is quite cool :)
I'm also using the following: 1 CPU CYCLE, 3 PPU CYCLES, 1 CPU CYCLE, 3 PPU CYCLES....... setup for NTSC.
So I really want to understand how this really works.

-Eicar


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