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M2 and MMC3
http://forums.nesdev.com/viewtopic.php?f=3&t=16328
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Author:  Anes [ Tue Aug 08, 2017 8:45 pm ]
Post subject:  M2 and MMC3

The Wiki says:

Quote:
The MMC3 scanline counter is based entirely on PPU A12, triggered on rising edges (after the line remains low for two rising edges of M2).


Can somebody explain me what is "M2"?
Thxs

Author:  Zepper [ Tue Aug 08, 2017 8:55 pm ]
Post subject:  Re: M2 and MMC3

viewtopic.php?f=9&t=10984

Author:  lidnariq [ Tue Aug 08, 2017 9:32 pm ]
Post subject:  Re: M2 and MMC3

M2 is specifically the external CPU cycle signal.

It is not the master clock.
It is not the APU or DMA clocks.
It is not the PPU pixel or colorburst clock.

In the 2A03, it is high for 5/8 of the time and low for 3/8. The exact phase of it relative to the PPU is random, so the exact rise/fall time of M2 matters relative to PPU events.

Author:  Anes [ Tue Aug 08, 2017 10:10 pm ]
Post subject:  Re: M2 and MMC3

Thxs a lot to both!!

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