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PPU $2007 write behaviour?
http://forums.nesdev.com/viewtopic.php?f=3&t=17158
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Author:  Zepper [ Sun Mar 18, 2018 7:47 am ]
Post subject:  PPU $2007 write behaviour?

Do you remember this? Well, reading or writing $2007 during rendering triggers a Y increment and a coarse X increment, but is the PPU write* performed? Ignored?

*a write to CHR RAM, nametables or color ram

In other words... is this correct?
Code:
      //2007W I/O
      case 7:
        if(ppuisrendering) {
           _clock_y(); _clock_x();
        } else {
           unsigned int tempaddr = ppu->address & 0x3FFF;
           ppu->address = (ppu->address + ppu->inc) & 0x7FFF;
           if(tempaddr < 0x2000) {
 /* CHR RAM write */
           } else if(tempaddr < 0x3F00) {
/* nametable write */
           } else {
/* color ram write */
           }
        }

Author:  dougeff [ Sun Mar 18, 2018 10:42 am ]
Post subject:  Re: PPU $2007 write behaviour?

Quote:
reading or writing $2007 during rendering triggers a Y increment and a coarse X increment


That would explain a lot (tests that I've done on reading / writing during rendering causing y scroll errors).

Author:  lidnariq [ Sun Mar 18, 2018 12:03 pm ]
Post subject:  Re: PPU $2007 write behaviour?

Zepper wrote:
but is the PPU write* performed?
Approximately yes.

The PPU's ALE signal is high when appropriate according to either the write sequence or the ordinary fetch cadence. This will smear addresses and data all over each other during the time.

The PPU's /WR strobe goes low. The /RD strobe is controlled entirely separately—this will yield a situation in which both /RD and /WR are low. For most RAMs this causes a write.

I don't know whether it can cause a write to palette memory. There aren't quite enough named nodes in Visual2C02 for me to easily track down whether the address logic to enable palette writes can be easily tickled.

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