So, I'm writing yet another NES emulator, for my own amusement and learning purposes. I've got most of the basic stuff working and decided to dive into some log standing timing issues.

I'm currently failing blargg's NMI timing test (05-nmi_timing, from ppu_vbl_nmi test suite).

Each loop of my CPU code is an instruction and it calls PPU/APU as needed to let them catch up before reads/writes. I poll interrupts at the second-to-last cycle, except in branches and interrupt routines.

This is my output:

4, 3, 3, 3, 3, 3, 3, 2, 2, 2

And a more detailed log:

Any input is much appreciated!STA 0x2000.7: x 326 y 240

LDX: x 326 y 240

Interrupt polling: x 329 y 240

LDX: x 332 y 240

Interrupt polling: x 335 y 240

LDX: x 338 y 240

Interrupt polling: x 0 y 241

NMI triggered: x 1 y 241

LDX: x 3 y 241

Interrupt polling: x 6 y 241

Load NMI pointer:x 9 y 241

STA 0x2000.7: x 327 y 240

LDX: x 327 y 240

Interrupt polling: x 330 y 240

LDX: x 333 y 240

Interrupt polling: x 336 y 240

LDX: x 339 y 240

NMI triggered: x 1 y 241

Interrupt polling: x 1 y 241

Load NMI pointer:x 4 y 241

STA 0x2000.7: x 328 y 240

LDX: x 328 y 240

Interrupt polling: x 331 y 240

LDX: x 334 y 240

Interrupt polling: x 337 y 240

LDX: x 340 y 240

NMI triggered: x 1 y 241

Interrupt polling: x 2 y 241

Load NMI pointer:x 5 y 241

STA 0x2000.7: x 329 y 240

LDX: x 329 y 240

Interrupt polling: x 332 y 240

LDX: x 335 y 240

Interrupt polling: x 338 y 240

LDX: x 0 y 241

NMI triggered: x 1 y 241

Interrupt polling: x 3 y 241

Load NMI pointer:x 6 y 241

STA 0x2000.7: x 330 y 240

LDX: x 330 y 240

Interrupt polling: x 333 y 240

LDX: x 336 y 240

Interrupt polling: x 339 y 240

NMI triggered: x 1 y 241

LDX: x 1 y 241

Interrupt polling: x 4 y 241

Load NMI pointer:x 7 y 241

STA 0x2000.7: x 331 y 240

LDX: x 331 y 240

Interrupt polling: x 334 y 240

LDX: x 337 y 240

Interrupt polling: x 340 y 240

NMI triggered: x 1 y 241

LDX: x 2 y 241

Interrupt polling: x 5 y 241

Load NMI pointer:x 8 y 241

STA 0x2000.7: x 332 y 240

LDX: x 332 y 240

Interrupt polling: x 335 y 240

LDX: x 338 y 240

Interrupt polling: x 0 y 241

NMI triggered: x 1 y 241

LDX: x 3 y 241

Interrupt polling: x 6 y 241

Load NMI pointer:x 9 y 241

STA 0x2000.7: x 333 y 240

LDX: x 333 y 240

Interrupt polling: x 336 y 240

LDX: x 339 y 240

NMI triggered: x 1 y 241

Interrupt polling: x 1 y 241

Load NMI pointer:x 4 y 241

STA 0x2000.7: x 334 y 240

LDX: x 334 y 240

Interrupt polling: x 337 y 240

LDX: x 340 y 240

NMI triggered: x 1 y 241

Interrupt polling: x 2 y 241

Load NMI pointer:x 5 y 241

STA 0x2000.7: x 335 y 240

LDX: x 335 y 240

Interrupt polling: x 338 y 240

LDX: x 0 y 241

NMI triggered: x 1 y 241

Interrupt polling: x 3 y 241

Load NMI pointer:x 6 y 241