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PostPosted: Sat Sep 01, 2018 2:36 am 
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HastatusXXI wrote:
The address $C000 doesn't appear on my log (I tried both the ROM on the wiki and the one provided by Quietust in this post). There's no clue neither of the instruction JMP $C5F5 nor any of the adjacent to it.

$C000 isn't supposed to be in the log from a full emulator. The code there is for solely jump-starting WIP emulators and is otherwise unreachable. The JMP $C5F5 there is telling you where to look - the test proper starts at $C5F5.

You'll have to do some address-finding for blargg's test ROMs too, as they contain code to display the results. This code will wait for the PPU and thus output a different log unless your PPU timings match perfectly, which is unlikely at this point. You'll need to trim the logs to just the routines that perform each test, which will involve some disassembly.

It would be much, much easier to make your emulator dump the debug output all of blargg's tests write to $6000 instead. The format of the data at this address is documented in the readme.txt file that comes with each set of tests, and is designed for exactly this purpose - a handful of extra lines of code added to your emulator will give you instant automatic testing.


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PostPosted: Sat Sep 01, 2018 4:50 am 
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Anyway, according to blargg's cpu-timing test readme it relays on interrupts to determine the correcrness of timing, since it tests most of the instructions generating an infinite loop that should be interrupted via NMI (as I've been reading the PPU is the only source of this interrupt in the NES). For that reason, I shouldn't be able to use blargg's tests until I have my PPU implemented, right? Or can I simulate NMI in some way prior to inplementing PPU?

Edit: I think blargg's intr_test-v5 doesn't depend on PPU, but, as I said before, Nintendulator doesn't pass its third test. I think I'll write to blargg about this, in the end.


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PostPosted: Sat Sep 01, 2018 5:10 am 
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There are two IRQ sources in the 2A03 alone: APU frame counter and DMC completion. So you'll need to implement the APU to run APU-dependent tests or the PPU to run PPU-dependent tests. Look at the README to determine which you have.


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PostPosted: Sat Sep 01, 2018 9:14 pm 
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koitsu wrote:
Code:
  lda #$6c     ; Instruction $6C, JMP indirect
  sta $0600

When NMI executes, it's going to load the vector contents into PC, so PC=$0600. $0600 now contains the bytes $6c 40 c5, which is decoded/executed as jmp ($c540). From that point forward, the program only has to changes what's in $0601 and $0602 if it wants to "move" what NMI executes. Final Fantasy 2 (J) uses this technique (NMI vector points to $0100).


And it turns out I was also getting some things messed up - if you're going to point the NMI vector directly at RAM, you'd just want an ordinary JMP (4C) instruction, whereas if you wanted to use only 2 bytes of RAM instead of 3, you'd put your NMI routine in ROM and have it consist solely of "JMP ($0600)" and then put the address of the actual NMI routine at that location.

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Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.


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PostPosted: Sat Sep 01, 2018 9:40 pm 
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@Quietust -- yeah, you're right. I think both our brains were simultaneously thinking the right thing, just slightly tweaked in different ways. Ha. Yes, the instruction should be 4C (jmp abs) not 6C (jmp (indr)). I'll edit my above post to reflect stuff. Thanks for catching that too though!


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