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PostPosted: Sun Aug 11, 2019 12:34 pm 
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I'm unable to get NMI working properly with Donkey Kong.
When the CPU arrives at this line
Code:
C7DC  8D 00 20  STA $2000 = 10                  A:90 X:00 Y:00 P:A4 SP:FF PPU:208, 47 CYC:64980

bit 7 of $2000 is set to 1 and, given that this is in a frame rendering, when it reaches VBLANK this bit won't change, since it's already toggled. In the next frame this is solved, since STA is done with A:10, but, according to Nintendulator's DK log, this NMI shouldn't be skipped. Any idea on what's going on?

Another question regarding that: why does the first NMI take place on cycle 86972? Isn't it supposed to happen after cycle 27384? (http://wiki.nesdev.com/w/index.php/PPU_power_up_state)


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PostPosted: Sun Aug 11, 2019 12:56 pm 
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Usually, at least the first two frames' vblank have no /NMI because the CPU is still waiting for the PPU to stabilize before enabling NMI generation in $2000.

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PostPosted: Mon Aug 12, 2019 8:18 am 
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tepples wrote:
Usually, at least the first two frames' vblank have no /NMI because the CPU is still waiting for the PPU to stabilize before enabling NMI generation in $2000.

That solves my second question, thank you!

However, I still have no clue about the first. Let me clarify a little bit, since my explanation might be confusing:
The first NMI takes place on cycle 86972. This line
Code:
C7DC  8D 00 20  STA $2000 = 10                  A:90 X:00 Y:00 P:A4 SP:FF PPU:208, 47 CYC:64980

occurs in the same frame this first NMI happens. This line toggles bit 7 of $2000 and no other instruction accesses this address until some cycles after NMI has been handled. However, AFAIK, for NMI to occur PPU has to be in VBLANK (bit 7 of $2002 toggled) and bit 7 of $2000 must be toggled during VBLANK (i.e. 0->1, but being 1 before VBLANK starts shouldn't trigger NMI, should it? [edge-sensitivity?]).
So, my question is: Why is NMI, indeed, triggered, given what I exposed? Am I missing something?


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PostPosted: Mon Aug 12, 2019 9:48 am 
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HastatusXXI wrote:
for NMI to occur PPU has to be in VBLANK (bit 7 of $2002 toggled) and bit 7 of $2000 must be toggled during VBLANK (i.e. 0->1, but being 1 before VBLANK starts shouldn't trigger NMI, should it? [edge-sensitivity?]).
It is edge-triggered, but it's triggered on (reg2000 bitAND reg2002 bitAND 128). As long as either is true, a rising edge in the other will cause an NMI


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PostPosted: Mon Aug 12, 2019 10:30 am 
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lidnariq wrote:
HastatusXXI wrote:
for NMI to occur PPU has to be in VBLANK (bit 7 of $2002 toggled) and bit 7 of $2000 must be toggled during VBLANK (i.e. 0->1, but being 1 before VBLANK starts shouldn't trigger NMI, should it? [edge-sensitivity?]).
It is edge-triggered, but it's triggered on (reg2000 bitAND reg2002 bitAND 128). As long as either is true, a rising edge in the other will cause an NMI


That explains it. Thank you!


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PostPosted: Mon Aug 12, 2019 1:06 pm 
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It occurs to me that the text on the wiki might have misled you. Any suggestions on things we might change to help with that?


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PostPosted: Wed Aug 21, 2019 2:56 pm 
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lidnariq wrote:
It occurs to me that the text on the wiki might have misled you. Any suggestions on things we might change to help with that?


Sure. This page http://wiki.nesdev.com/w/index.php/NMI (operation) is well suited to come up with an implementation for NMI, while this other http://wiki.nesdev.com/w/index.php/CPU_interrupts explains the hardware behaviour (edge-sensitivity). However, it might seem unrelated at first for people who are novice like me. An effort to connect both pages should be made, in my opinion. Besides, this sentence "The PPU pulls /NMI low if and only if both NMI_occurred and NMI_output are true." in the section operation of the first page needs clarification. I'm unable to get what you explained to me from that.

Sorry for the delay. I'm unable to dedicate to this project all the time I'd like.


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